/***************************************************************************//**
* \file cyreg_peri_ms.h
*
* \brief
* PERI_MS register definition header
*
* \note
* Generator version: 1.6.0.217
* Database revision: TVIIBE4M_WW2014_BTO
*
********************************************************************************
* \copyright
* Copyright 2016-2020, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
*******************************************************************************/

#ifndef _CYREG_PERI_MS_H_
#define _CYREG_PERI_MS_H_

#include "cyip_peri_ms_v2.h"

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR0)
  */
#define CYREG_PERI_MS_PPU_PR0_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40010000UL)
#define CYREG_PERI_MS_PPU_PR0_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40010004UL)
#define CYREG_PERI_MS_PPU_PR0_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40010010UL)
#define CYREG_PERI_MS_PPU_PR0_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40010014UL)
#define CYREG_PERI_MS_PPU_PR0_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40010018UL)
#define CYREG_PERI_MS_PPU_PR0_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4001001CUL)
#define CYREG_PERI_MS_PPU_PR0_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40010020UL)
#define CYREG_PERI_MS_PPU_PR0_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40010024UL)
#define CYREG_PERI_MS_PPU_PR0_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40010030UL)
#define CYREG_PERI_MS_PPU_PR0_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40010034UL)
#define CYREG_PERI_MS_PPU_PR0_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40010038UL)
#define CYREG_PERI_MS_PPU_PR0_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4001003CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR1)
  */
#define CYREG_PERI_MS_PPU_PR1_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40010040UL)
#define CYREG_PERI_MS_PPU_PR1_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40010044UL)
#define CYREG_PERI_MS_PPU_PR1_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40010050UL)
#define CYREG_PERI_MS_PPU_PR1_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40010054UL)
#define CYREG_PERI_MS_PPU_PR1_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40010058UL)
#define CYREG_PERI_MS_PPU_PR1_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4001005CUL)
#define CYREG_PERI_MS_PPU_PR1_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40010060UL)
#define CYREG_PERI_MS_PPU_PR1_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40010064UL)
#define CYREG_PERI_MS_PPU_PR1_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40010070UL)
#define CYREG_PERI_MS_PPU_PR1_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40010074UL)
#define CYREG_PERI_MS_PPU_PR1_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40010078UL)
#define CYREG_PERI_MS_PPU_PR1_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4001007CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR2)
  */
#define CYREG_PERI_MS_PPU_PR2_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40010080UL)
#define CYREG_PERI_MS_PPU_PR2_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40010084UL)
#define CYREG_PERI_MS_PPU_PR2_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40010090UL)
#define CYREG_PERI_MS_PPU_PR2_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40010094UL)
#define CYREG_PERI_MS_PPU_PR2_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40010098UL)
#define CYREG_PERI_MS_PPU_PR2_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4001009CUL)
#define CYREG_PERI_MS_PPU_PR2_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400100A0UL)
#define CYREG_PERI_MS_PPU_PR2_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400100A4UL)
#define CYREG_PERI_MS_PPU_PR2_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400100B0UL)
#define CYREG_PERI_MS_PPU_PR2_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400100B4UL)
#define CYREG_PERI_MS_PPU_PR2_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400100B8UL)
#define CYREG_PERI_MS_PPU_PR2_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400100BCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR3)
  */
#define CYREG_PERI_MS_PPU_PR3_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x400100C0UL)
#define CYREG_PERI_MS_PPU_PR3_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x400100C4UL)
#define CYREG_PERI_MS_PPU_PR3_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x400100D0UL)
#define CYREG_PERI_MS_PPU_PR3_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x400100D4UL)
#define CYREG_PERI_MS_PPU_PR3_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x400100D8UL)
#define CYREG_PERI_MS_PPU_PR3_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x400100DCUL)
#define CYREG_PERI_MS_PPU_PR3_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400100E0UL)
#define CYREG_PERI_MS_PPU_PR3_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400100E4UL)
#define CYREG_PERI_MS_PPU_PR3_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400100F0UL)
#define CYREG_PERI_MS_PPU_PR3_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400100F4UL)
#define CYREG_PERI_MS_PPU_PR3_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400100F8UL)
#define CYREG_PERI_MS_PPU_PR3_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400100FCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR4)
  */
#define CYREG_PERI_MS_PPU_PR4_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40010100UL)
#define CYREG_PERI_MS_PPU_PR4_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40010104UL)
#define CYREG_PERI_MS_PPU_PR4_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40010110UL)
#define CYREG_PERI_MS_PPU_PR4_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40010114UL)
#define CYREG_PERI_MS_PPU_PR4_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40010118UL)
#define CYREG_PERI_MS_PPU_PR4_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4001011CUL)
#define CYREG_PERI_MS_PPU_PR4_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40010120UL)
#define CYREG_PERI_MS_PPU_PR4_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40010124UL)
#define CYREG_PERI_MS_PPU_PR4_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40010130UL)
#define CYREG_PERI_MS_PPU_PR4_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40010134UL)
#define CYREG_PERI_MS_PPU_PR4_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40010138UL)
#define CYREG_PERI_MS_PPU_PR4_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4001013CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR5)
  */
#define CYREG_PERI_MS_PPU_PR5_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40010140UL)
#define CYREG_PERI_MS_PPU_PR5_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40010144UL)
#define CYREG_PERI_MS_PPU_PR5_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40010150UL)
#define CYREG_PERI_MS_PPU_PR5_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40010154UL)
#define CYREG_PERI_MS_PPU_PR5_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40010158UL)
#define CYREG_PERI_MS_PPU_PR5_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4001015CUL)
#define CYREG_PERI_MS_PPU_PR5_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40010160UL)
#define CYREG_PERI_MS_PPU_PR5_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40010164UL)
#define CYREG_PERI_MS_PPU_PR5_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40010170UL)
#define CYREG_PERI_MS_PPU_PR5_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40010174UL)
#define CYREG_PERI_MS_PPU_PR5_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40010178UL)
#define CYREG_PERI_MS_PPU_PR5_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4001017CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR6)
  */
#define CYREG_PERI_MS_PPU_PR6_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40010180UL)
#define CYREG_PERI_MS_PPU_PR6_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40010184UL)
#define CYREG_PERI_MS_PPU_PR6_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40010190UL)
#define CYREG_PERI_MS_PPU_PR6_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40010194UL)
#define CYREG_PERI_MS_PPU_PR6_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40010198UL)
#define CYREG_PERI_MS_PPU_PR6_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4001019CUL)
#define CYREG_PERI_MS_PPU_PR6_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400101A0UL)
#define CYREG_PERI_MS_PPU_PR6_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400101A4UL)
#define CYREG_PERI_MS_PPU_PR6_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400101B0UL)
#define CYREG_PERI_MS_PPU_PR6_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400101B4UL)
#define CYREG_PERI_MS_PPU_PR6_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400101B8UL)
#define CYREG_PERI_MS_PPU_PR6_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400101BCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR7)
  */
#define CYREG_PERI_MS_PPU_PR7_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x400101C0UL)
#define CYREG_PERI_MS_PPU_PR7_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x400101C4UL)
#define CYREG_PERI_MS_PPU_PR7_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x400101D0UL)
#define CYREG_PERI_MS_PPU_PR7_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x400101D4UL)
#define CYREG_PERI_MS_PPU_PR7_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x400101D8UL)
#define CYREG_PERI_MS_PPU_PR7_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x400101DCUL)
#define CYREG_PERI_MS_PPU_PR7_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400101E0UL)
#define CYREG_PERI_MS_PPU_PR7_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400101E4UL)
#define CYREG_PERI_MS_PPU_PR7_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400101F0UL)
#define CYREG_PERI_MS_PPU_PR7_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400101F4UL)
#define CYREG_PERI_MS_PPU_PR7_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400101F8UL)
#define CYREG_PERI_MS_PPU_PR7_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400101FCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR8)
  */
#define CYREG_PERI_MS_PPU_PR8_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40010200UL)
#define CYREG_PERI_MS_PPU_PR8_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40010204UL)
#define CYREG_PERI_MS_PPU_PR8_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40010210UL)
#define CYREG_PERI_MS_PPU_PR8_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40010214UL)
#define CYREG_PERI_MS_PPU_PR8_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40010218UL)
#define CYREG_PERI_MS_PPU_PR8_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4001021CUL)
#define CYREG_PERI_MS_PPU_PR8_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40010220UL)
#define CYREG_PERI_MS_PPU_PR8_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40010224UL)
#define CYREG_PERI_MS_PPU_PR8_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40010230UL)
#define CYREG_PERI_MS_PPU_PR8_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40010234UL)
#define CYREG_PERI_MS_PPU_PR8_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40010238UL)
#define CYREG_PERI_MS_PPU_PR8_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4001023CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR9)
  */
#define CYREG_PERI_MS_PPU_PR9_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40010240UL)
#define CYREG_PERI_MS_PPU_PR9_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40010244UL)
#define CYREG_PERI_MS_PPU_PR9_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40010250UL)
#define CYREG_PERI_MS_PPU_PR9_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40010254UL)
#define CYREG_PERI_MS_PPU_PR9_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40010258UL)
#define CYREG_PERI_MS_PPU_PR9_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4001025CUL)
#define CYREG_PERI_MS_PPU_PR9_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40010260UL)
#define CYREG_PERI_MS_PPU_PR9_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40010264UL)
#define CYREG_PERI_MS_PPU_PR9_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40010270UL)
#define CYREG_PERI_MS_PPU_PR9_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40010274UL)
#define CYREG_PERI_MS_PPU_PR9_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40010278UL)
#define CYREG_PERI_MS_PPU_PR9_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4001027CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR10)
  */
#define CYREG_PERI_MS_PPU_PR10_SL_ADDR  ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40010280UL)
#define CYREG_PERI_MS_PPU_PR10_SL_SIZE  ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40010284UL)
#define CYREG_PERI_MS_PPU_PR10_SL_ATT0  ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40010290UL)
#define CYREG_PERI_MS_PPU_PR10_SL_ATT1  ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40010294UL)
#define CYREG_PERI_MS_PPU_PR10_SL_ATT2  ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40010298UL)
#define CYREG_PERI_MS_PPU_PR10_SL_ATT3  ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4001029CUL)
#define CYREG_PERI_MS_PPU_PR10_MS_ADDR  ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400102A0UL)
#define CYREG_PERI_MS_PPU_PR10_MS_SIZE  ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400102A4UL)
#define CYREG_PERI_MS_PPU_PR10_MS_ATT0  ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400102B0UL)
#define CYREG_PERI_MS_PPU_PR10_MS_ATT1  ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400102B4UL)
#define CYREG_PERI_MS_PPU_PR10_MS_ATT2  ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400102B8UL)
#define CYREG_PERI_MS_PPU_PR10_MS_ATT3  ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400102BCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR11)
  */
#define CYREG_PERI_MS_PPU_PR11_SL_ADDR  ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x400102C0UL)
#define CYREG_PERI_MS_PPU_PR11_SL_SIZE  ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x400102C4UL)
#define CYREG_PERI_MS_PPU_PR11_SL_ATT0  ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x400102D0UL)
#define CYREG_PERI_MS_PPU_PR11_SL_ATT1  ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x400102D4UL)
#define CYREG_PERI_MS_PPU_PR11_SL_ATT2  ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x400102D8UL)
#define CYREG_PERI_MS_PPU_PR11_SL_ATT3  ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x400102DCUL)
#define CYREG_PERI_MS_PPU_PR11_MS_ADDR  ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400102E0UL)
#define CYREG_PERI_MS_PPU_PR11_MS_SIZE  ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400102E4UL)
#define CYREG_PERI_MS_PPU_PR11_MS_ATT0  ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400102F0UL)
#define CYREG_PERI_MS_PPU_PR11_MS_ATT1  ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400102F4UL)
#define CYREG_PERI_MS_PPU_PR11_MS_ATT2  ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400102F8UL)
#define CYREG_PERI_MS_PPU_PR11_MS_ATT3  ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400102FCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR12)
  */
#define CYREG_PERI_MS_PPU_PR12_SL_ADDR  ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40010300UL)
#define CYREG_PERI_MS_PPU_PR12_SL_SIZE  ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40010304UL)
#define CYREG_PERI_MS_PPU_PR12_SL_ATT0  ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40010310UL)
#define CYREG_PERI_MS_PPU_PR12_SL_ATT1  ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40010314UL)
#define CYREG_PERI_MS_PPU_PR12_SL_ATT2  ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40010318UL)
#define CYREG_PERI_MS_PPU_PR12_SL_ATT3  ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4001031CUL)
#define CYREG_PERI_MS_PPU_PR12_MS_ADDR  ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40010320UL)
#define CYREG_PERI_MS_PPU_PR12_MS_SIZE  ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40010324UL)
#define CYREG_PERI_MS_PPU_PR12_MS_ATT0  ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40010330UL)
#define CYREG_PERI_MS_PPU_PR12_MS_ATT1  ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40010334UL)
#define CYREG_PERI_MS_PPU_PR12_MS_ATT2  ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40010338UL)
#define CYREG_PERI_MS_PPU_PR12_MS_ATT3  ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4001033CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR13)
  */
#define CYREG_PERI_MS_PPU_PR13_SL_ADDR  ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40010340UL)
#define CYREG_PERI_MS_PPU_PR13_SL_SIZE  ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40010344UL)
#define CYREG_PERI_MS_PPU_PR13_SL_ATT0  ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40010350UL)
#define CYREG_PERI_MS_PPU_PR13_SL_ATT1  ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40010354UL)
#define CYREG_PERI_MS_PPU_PR13_SL_ATT2  ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40010358UL)
#define CYREG_PERI_MS_PPU_PR13_SL_ATT3  ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4001035CUL)
#define CYREG_PERI_MS_PPU_PR13_MS_ADDR  ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40010360UL)
#define CYREG_PERI_MS_PPU_PR13_MS_SIZE  ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40010364UL)
#define CYREG_PERI_MS_PPU_PR13_MS_ATT0  ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40010370UL)
#define CYREG_PERI_MS_PPU_PR13_MS_ATT1  ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40010374UL)
#define CYREG_PERI_MS_PPU_PR13_MS_ATT2  ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40010378UL)
#define CYREG_PERI_MS_PPU_PR13_MS_ATT3  ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4001037CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR14)
  */
#define CYREG_PERI_MS_PPU_PR14_SL_ADDR  ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40010380UL)
#define CYREG_PERI_MS_PPU_PR14_SL_SIZE  ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40010384UL)
#define CYREG_PERI_MS_PPU_PR14_SL_ATT0  ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40010390UL)
#define CYREG_PERI_MS_PPU_PR14_SL_ATT1  ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40010394UL)
#define CYREG_PERI_MS_PPU_PR14_SL_ATT2  ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40010398UL)
#define CYREG_PERI_MS_PPU_PR14_SL_ATT3  ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4001039CUL)
#define CYREG_PERI_MS_PPU_PR14_MS_ADDR  ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400103A0UL)
#define CYREG_PERI_MS_PPU_PR14_MS_SIZE  ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400103A4UL)
#define CYREG_PERI_MS_PPU_PR14_MS_ATT0  ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400103B0UL)
#define CYREG_PERI_MS_PPU_PR14_MS_ATT1  ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400103B4UL)
#define CYREG_PERI_MS_PPU_PR14_MS_ATT2  ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400103B8UL)
#define CYREG_PERI_MS_PPU_PR14_MS_ATT3  ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400103BCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR15)
  */
#define CYREG_PERI_MS_PPU_PR15_SL_ADDR  ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x400103C0UL)
#define CYREG_PERI_MS_PPU_PR15_SL_SIZE  ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x400103C4UL)
#define CYREG_PERI_MS_PPU_PR15_SL_ATT0  ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x400103D0UL)
#define CYREG_PERI_MS_PPU_PR15_SL_ATT1  ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x400103D4UL)
#define CYREG_PERI_MS_PPU_PR15_SL_ATT2  ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x400103D8UL)
#define CYREG_PERI_MS_PPU_PR15_SL_ATT3  ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x400103DCUL)
#define CYREG_PERI_MS_PPU_PR15_MS_ADDR  ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400103E0UL)
#define CYREG_PERI_MS_PPU_PR15_MS_SIZE  ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400103E4UL)
#define CYREG_PERI_MS_PPU_PR15_MS_ATT0  ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400103F0UL)
#define CYREG_PERI_MS_PPU_PR15_MS_ATT1  ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400103F4UL)
#define CYREG_PERI_MS_PPU_PR15_MS_ATT2  ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400103F8UL)
#define CYREG_PERI_MS_PPU_PR15_MS_ATT3  ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400103FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX0)
  */
#define CYREG_PERI_MS_PPU_FX0_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010800UL)
#define CYREG_PERI_MS_PPU_FX0_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010804UL)
#define CYREG_PERI_MS_PPU_FX0_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010810UL)
#define CYREG_PERI_MS_PPU_FX0_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010814UL)
#define CYREG_PERI_MS_PPU_FX0_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010818UL)
#define CYREG_PERI_MS_PPU_FX0_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001081CUL)
#define CYREG_PERI_MS_PPU_FX0_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010820UL)
#define CYREG_PERI_MS_PPU_FX0_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010824UL)
#define CYREG_PERI_MS_PPU_FX0_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010830UL)
#define CYREG_PERI_MS_PPU_FX0_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010834UL)
#define CYREG_PERI_MS_PPU_FX0_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010838UL)
#define CYREG_PERI_MS_PPU_FX0_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001083CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX1)
  */
#define CYREG_PERI_MS_PPU_FX1_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010840UL)
#define CYREG_PERI_MS_PPU_FX1_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010844UL)
#define CYREG_PERI_MS_PPU_FX1_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010850UL)
#define CYREG_PERI_MS_PPU_FX1_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010854UL)
#define CYREG_PERI_MS_PPU_FX1_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010858UL)
#define CYREG_PERI_MS_PPU_FX1_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001085CUL)
#define CYREG_PERI_MS_PPU_FX1_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010860UL)
#define CYREG_PERI_MS_PPU_FX1_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010864UL)
#define CYREG_PERI_MS_PPU_FX1_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010870UL)
#define CYREG_PERI_MS_PPU_FX1_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010874UL)
#define CYREG_PERI_MS_PPU_FX1_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010878UL)
#define CYREG_PERI_MS_PPU_FX1_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001087CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX2)
  */
#define CYREG_PERI_MS_PPU_FX2_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010880UL)
#define CYREG_PERI_MS_PPU_FX2_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010884UL)
#define CYREG_PERI_MS_PPU_FX2_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010890UL)
#define CYREG_PERI_MS_PPU_FX2_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010894UL)
#define CYREG_PERI_MS_PPU_FX2_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010898UL)
#define CYREG_PERI_MS_PPU_FX2_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001089CUL)
#define CYREG_PERI_MS_PPU_FX2_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400108A0UL)
#define CYREG_PERI_MS_PPU_FX2_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400108A4UL)
#define CYREG_PERI_MS_PPU_FX2_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400108B0UL)
#define CYREG_PERI_MS_PPU_FX2_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400108B4UL)
#define CYREG_PERI_MS_PPU_FX2_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400108B8UL)
#define CYREG_PERI_MS_PPU_FX2_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400108BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX3)
  */
#define CYREG_PERI_MS_PPU_FX3_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400108C0UL)
#define CYREG_PERI_MS_PPU_FX3_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400108C4UL)
#define CYREG_PERI_MS_PPU_FX3_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400108D0UL)
#define CYREG_PERI_MS_PPU_FX3_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400108D4UL)
#define CYREG_PERI_MS_PPU_FX3_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400108D8UL)
#define CYREG_PERI_MS_PPU_FX3_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400108DCUL)
#define CYREG_PERI_MS_PPU_FX3_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400108E0UL)
#define CYREG_PERI_MS_PPU_FX3_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400108E4UL)
#define CYREG_PERI_MS_PPU_FX3_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400108F0UL)
#define CYREG_PERI_MS_PPU_FX3_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400108F4UL)
#define CYREG_PERI_MS_PPU_FX3_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400108F8UL)
#define CYREG_PERI_MS_PPU_FX3_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400108FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX4)
  */
#define CYREG_PERI_MS_PPU_FX4_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010900UL)
#define CYREG_PERI_MS_PPU_FX4_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010904UL)
#define CYREG_PERI_MS_PPU_FX4_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010910UL)
#define CYREG_PERI_MS_PPU_FX4_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010914UL)
#define CYREG_PERI_MS_PPU_FX4_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010918UL)
#define CYREG_PERI_MS_PPU_FX4_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001091CUL)
#define CYREG_PERI_MS_PPU_FX4_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010920UL)
#define CYREG_PERI_MS_PPU_FX4_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010924UL)
#define CYREG_PERI_MS_PPU_FX4_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010930UL)
#define CYREG_PERI_MS_PPU_FX4_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010934UL)
#define CYREG_PERI_MS_PPU_FX4_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010938UL)
#define CYREG_PERI_MS_PPU_FX4_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001093CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX5)
  */
#define CYREG_PERI_MS_PPU_FX5_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010940UL)
#define CYREG_PERI_MS_PPU_FX5_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010944UL)
#define CYREG_PERI_MS_PPU_FX5_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010950UL)
#define CYREG_PERI_MS_PPU_FX5_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010954UL)
#define CYREG_PERI_MS_PPU_FX5_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010958UL)
#define CYREG_PERI_MS_PPU_FX5_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001095CUL)
#define CYREG_PERI_MS_PPU_FX5_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010960UL)
#define CYREG_PERI_MS_PPU_FX5_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010964UL)
#define CYREG_PERI_MS_PPU_FX5_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010970UL)
#define CYREG_PERI_MS_PPU_FX5_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010974UL)
#define CYREG_PERI_MS_PPU_FX5_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010978UL)
#define CYREG_PERI_MS_PPU_FX5_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001097CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX6)
  */
#define CYREG_PERI_MS_PPU_FX6_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010980UL)
#define CYREG_PERI_MS_PPU_FX6_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010984UL)
#define CYREG_PERI_MS_PPU_FX6_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010990UL)
#define CYREG_PERI_MS_PPU_FX6_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010994UL)
#define CYREG_PERI_MS_PPU_FX6_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010998UL)
#define CYREG_PERI_MS_PPU_FX6_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001099CUL)
#define CYREG_PERI_MS_PPU_FX6_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400109A0UL)
#define CYREG_PERI_MS_PPU_FX6_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400109A4UL)
#define CYREG_PERI_MS_PPU_FX6_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400109B0UL)
#define CYREG_PERI_MS_PPU_FX6_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400109B4UL)
#define CYREG_PERI_MS_PPU_FX6_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400109B8UL)
#define CYREG_PERI_MS_PPU_FX6_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400109BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX7)
  */
#define CYREG_PERI_MS_PPU_FX7_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400109C0UL)
#define CYREG_PERI_MS_PPU_FX7_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400109C4UL)
#define CYREG_PERI_MS_PPU_FX7_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400109D0UL)
#define CYREG_PERI_MS_PPU_FX7_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400109D4UL)
#define CYREG_PERI_MS_PPU_FX7_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400109D8UL)
#define CYREG_PERI_MS_PPU_FX7_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400109DCUL)
#define CYREG_PERI_MS_PPU_FX7_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400109E0UL)
#define CYREG_PERI_MS_PPU_FX7_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400109E4UL)
#define CYREG_PERI_MS_PPU_FX7_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400109F0UL)
#define CYREG_PERI_MS_PPU_FX7_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400109F4UL)
#define CYREG_PERI_MS_PPU_FX7_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400109F8UL)
#define CYREG_PERI_MS_PPU_FX7_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400109FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX8)
  */
#define CYREG_PERI_MS_PPU_FX8_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010A00UL)
#define CYREG_PERI_MS_PPU_FX8_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010A04UL)
#define CYREG_PERI_MS_PPU_FX8_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010A10UL)
#define CYREG_PERI_MS_PPU_FX8_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010A14UL)
#define CYREG_PERI_MS_PPU_FX8_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010A18UL)
#define CYREG_PERI_MS_PPU_FX8_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010A1CUL)
#define CYREG_PERI_MS_PPU_FX8_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010A20UL)
#define CYREG_PERI_MS_PPU_FX8_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010A24UL)
#define CYREG_PERI_MS_PPU_FX8_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010A30UL)
#define CYREG_PERI_MS_PPU_FX8_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010A34UL)
#define CYREG_PERI_MS_PPU_FX8_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010A38UL)
#define CYREG_PERI_MS_PPU_FX8_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX9)
  */
#define CYREG_PERI_MS_PPU_FX9_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010A40UL)
#define CYREG_PERI_MS_PPU_FX9_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010A44UL)
#define CYREG_PERI_MS_PPU_FX9_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010A50UL)
#define CYREG_PERI_MS_PPU_FX9_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010A54UL)
#define CYREG_PERI_MS_PPU_FX9_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010A58UL)
#define CYREG_PERI_MS_PPU_FX9_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010A5CUL)
#define CYREG_PERI_MS_PPU_FX9_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010A60UL)
#define CYREG_PERI_MS_PPU_FX9_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010A64UL)
#define CYREG_PERI_MS_PPU_FX9_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010A70UL)
#define CYREG_PERI_MS_PPU_FX9_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010A74UL)
#define CYREG_PERI_MS_PPU_FX9_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010A78UL)
#define CYREG_PERI_MS_PPU_FX9_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX10)
  */
#define CYREG_PERI_MS_PPU_FX10_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010A80UL)
#define CYREG_PERI_MS_PPU_FX10_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010A84UL)
#define CYREG_PERI_MS_PPU_FX10_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010A90UL)
#define CYREG_PERI_MS_PPU_FX10_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010A94UL)
#define CYREG_PERI_MS_PPU_FX10_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010A98UL)
#define CYREG_PERI_MS_PPU_FX10_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010A9CUL)
#define CYREG_PERI_MS_PPU_FX10_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010AA0UL)
#define CYREG_PERI_MS_PPU_FX10_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010AA4UL)
#define CYREG_PERI_MS_PPU_FX10_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010AB0UL)
#define CYREG_PERI_MS_PPU_FX10_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010AB4UL)
#define CYREG_PERI_MS_PPU_FX10_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010AB8UL)
#define CYREG_PERI_MS_PPU_FX10_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX11)
  */
#define CYREG_PERI_MS_PPU_FX11_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010AC0UL)
#define CYREG_PERI_MS_PPU_FX11_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010AC4UL)
#define CYREG_PERI_MS_PPU_FX11_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010AD0UL)
#define CYREG_PERI_MS_PPU_FX11_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010AD4UL)
#define CYREG_PERI_MS_PPU_FX11_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010AD8UL)
#define CYREG_PERI_MS_PPU_FX11_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010ADCUL)
#define CYREG_PERI_MS_PPU_FX11_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010AE0UL)
#define CYREG_PERI_MS_PPU_FX11_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010AE4UL)
#define CYREG_PERI_MS_PPU_FX11_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010AF0UL)
#define CYREG_PERI_MS_PPU_FX11_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010AF4UL)
#define CYREG_PERI_MS_PPU_FX11_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010AF8UL)
#define CYREG_PERI_MS_PPU_FX11_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX12)
  */
#define CYREG_PERI_MS_PPU_FX12_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010B00UL)
#define CYREG_PERI_MS_PPU_FX12_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010B04UL)
#define CYREG_PERI_MS_PPU_FX12_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010B10UL)
#define CYREG_PERI_MS_PPU_FX12_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010B14UL)
#define CYREG_PERI_MS_PPU_FX12_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010B18UL)
#define CYREG_PERI_MS_PPU_FX12_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010B1CUL)
#define CYREG_PERI_MS_PPU_FX12_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010B20UL)
#define CYREG_PERI_MS_PPU_FX12_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010B24UL)
#define CYREG_PERI_MS_PPU_FX12_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010B30UL)
#define CYREG_PERI_MS_PPU_FX12_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010B34UL)
#define CYREG_PERI_MS_PPU_FX12_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010B38UL)
#define CYREG_PERI_MS_PPU_FX12_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX13)
  */
#define CYREG_PERI_MS_PPU_FX13_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010B40UL)
#define CYREG_PERI_MS_PPU_FX13_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010B44UL)
#define CYREG_PERI_MS_PPU_FX13_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010B50UL)
#define CYREG_PERI_MS_PPU_FX13_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010B54UL)
#define CYREG_PERI_MS_PPU_FX13_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010B58UL)
#define CYREG_PERI_MS_PPU_FX13_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010B5CUL)
#define CYREG_PERI_MS_PPU_FX13_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010B60UL)
#define CYREG_PERI_MS_PPU_FX13_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010B64UL)
#define CYREG_PERI_MS_PPU_FX13_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010B70UL)
#define CYREG_PERI_MS_PPU_FX13_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010B74UL)
#define CYREG_PERI_MS_PPU_FX13_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010B78UL)
#define CYREG_PERI_MS_PPU_FX13_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX14)
  */
#define CYREG_PERI_MS_PPU_FX14_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010B80UL)
#define CYREG_PERI_MS_PPU_FX14_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010B84UL)
#define CYREG_PERI_MS_PPU_FX14_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010B90UL)
#define CYREG_PERI_MS_PPU_FX14_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010B94UL)
#define CYREG_PERI_MS_PPU_FX14_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010B98UL)
#define CYREG_PERI_MS_PPU_FX14_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010B9CUL)
#define CYREG_PERI_MS_PPU_FX14_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010BA0UL)
#define CYREG_PERI_MS_PPU_FX14_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010BA4UL)
#define CYREG_PERI_MS_PPU_FX14_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010BB0UL)
#define CYREG_PERI_MS_PPU_FX14_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010BB4UL)
#define CYREG_PERI_MS_PPU_FX14_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010BB8UL)
#define CYREG_PERI_MS_PPU_FX14_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX15)
  */
#define CYREG_PERI_MS_PPU_FX15_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010BC0UL)
#define CYREG_PERI_MS_PPU_FX15_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010BC4UL)
#define CYREG_PERI_MS_PPU_FX15_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010BD0UL)
#define CYREG_PERI_MS_PPU_FX15_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010BD4UL)
#define CYREG_PERI_MS_PPU_FX15_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010BD8UL)
#define CYREG_PERI_MS_PPU_FX15_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010BDCUL)
#define CYREG_PERI_MS_PPU_FX15_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010BE0UL)
#define CYREG_PERI_MS_PPU_FX15_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010BE4UL)
#define CYREG_PERI_MS_PPU_FX15_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010BF0UL)
#define CYREG_PERI_MS_PPU_FX15_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010BF4UL)
#define CYREG_PERI_MS_PPU_FX15_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010BF8UL)
#define CYREG_PERI_MS_PPU_FX15_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX16)
  */
#define CYREG_PERI_MS_PPU_FX16_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010C00UL)
#define CYREG_PERI_MS_PPU_FX16_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010C04UL)
#define CYREG_PERI_MS_PPU_FX16_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010C10UL)
#define CYREG_PERI_MS_PPU_FX16_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010C14UL)
#define CYREG_PERI_MS_PPU_FX16_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010C18UL)
#define CYREG_PERI_MS_PPU_FX16_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010C1CUL)
#define CYREG_PERI_MS_PPU_FX16_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010C20UL)
#define CYREG_PERI_MS_PPU_FX16_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010C24UL)
#define CYREG_PERI_MS_PPU_FX16_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010C30UL)
#define CYREG_PERI_MS_PPU_FX16_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010C34UL)
#define CYREG_PERI_MS_PPU_FX16_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010C38UL)
#define CYREG_PERI_MS_PPU_FX16_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX17)
  */
#define CYREG_PERI_MS_PPU_FX17_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010C40UL)
#define CYREG_PERI_MS_PPU_FX17_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010C44UL)
#define CYREG_PERI_MS_PPU_FX17_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010C50UL)
#define CYREG_PERI_MS_PPU_FX17_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010C54UL)
#define CYREG_PERI_MS_PPU_FX17_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010C58UL)
#define CYREG_PERI_MS_PPU_FX17_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010C5CUL)
#define CYREG_PERI_MS_PPU_FX17_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010C60UL)
#define CYREG_PERI_MS_PPU_FX17_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010C64UL)
#define CYREG_PERI_MS_PPU_FX17_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010C70UL)
#define CYREG_PERI_MS_PPU_FX17_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010C74UL)
#define CYREG_PERI_MS_PPU_FX17_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010C78UL)
#define CYREG_PERI_MS_PPU_FX17_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX18)
  */
#define CYREG_PERI_MS_PPU_FX18_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010C80UL)
#define CYREG_PERI_MS_PPU_FX18_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010C84UL)
#define CYREG_PERI_MS_PPU_FX18_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010C90UL)
#define CYREG_PERI_MS_PPU_FX18_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010C94UL)
#define CYREG_PERI_MS_PPU_FX18_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010C98UL)
#define CYREG_PERI_MS_PPU_FX18_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010C9CUL)
#define CYREG_PERI_MS_PPU_FX18_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010CA0UL)
#define CYREG_PERI_MS_PPU_FX18_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010CA4UL)
#define CYREG_PERI_MS_PPU_FX18_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010CB0UL)
#define CYREG_PERI_MS_PPU_FX18_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010CB4UL)
#define CYREG_PERI_MS_PPU_FX18_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010CB8UL)
#define CYREG_PERI_MS_PPU_FX18_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX19)
  */
#define CYREG_PERI_MS_PPU_FX19_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010CC0UL)
#define CYREG_PERI_MS_PPU_FX19_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010CC4UL)
#define CYREG_PERI_MS_PPU_FX19_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010CD0UL)
#define CYREG_PERI_MS_PPU_FX19_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010CD4UL)
#define CYREG_PERI_MS_PPU_FX19_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010CD8UL)
#define CYREG_PERI_MS_PPU_FX19_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010CDCUL)
#define CYREG_PERI_MS_PPU_FX19_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010CE0UL)
#define CYREG_PERI_MS_PPU_FX19_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010CE4UL)
#define CYREG_PERI_MS_PPU_FX19_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010CF0UL)
#define CYREG_PERI_MS_PPU_FX19_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010CF4UL)
#define CYREG_PERI_MS_PPU_FX19_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010CF8UL)
#define CYREG_PERI_MS_PPU_FX19_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX20)
  */
#define CYREG_PERI_MS_PPU_FX20_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010D00UL)
#define CYREG_PERI_MS_PPU_FX20_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010D04UL)
#define CYREG_PERI_MS_PPU_FX20_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010D10UL)
#define CYREG_PERI_MS_PPU_FX20_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010D14UL)
#define CYREG_PERI_MS_PPU_FX20_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010D18UL)
#define CYREG_PERI_MS_PPU_FX20_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010D1CUL)
#define CYREG_PERI_MS_PPU_FX20_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010D20UL)
#define CYREG_PERI_MS_PPU_FX20_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010D24UL)
#define CYREG_PERI_MS_PPU_FX20_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010D30UL)
#define CYREG_PERI_MS_PPU_FX20_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010D34UL)
#define CYREG_PERI_MS_PPU_FX20_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010D38UL)
#define CYREG_PERI_MS_PPU_FX20_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX21)
  */
#define CYREG_PERI_MS_PPU_FX21_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010D40UL)
#define CYREG_PERI_MS_PPU_FX21_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010D44UL)
#define CYREG_PERI_MS_PPU_FX21_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010D50UL)
#define CYREG_PERI_MS_PPU_FX21_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010D54UL)
#define CYREG_PERI_MS_PPU_FX21_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010D58UL)
#define CYREG_PERI_MS_PPU_FX21_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010D5CUL)
#define CYREG_PERI_MS_PPU_FX21_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010D60UL)
#define CYREG_PERI_MS_PPU_FX21_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010D64UL)
#define CYREG_PERI_MS_PPU_FX21_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010D70UL)
#define CYREG_PERI_MS_PPU_FX21_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010D74UL)
#define CYREG_PERI_MS_PPU_FX21_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010D78UL)
#define CYREG_PERI_MS_PPU_FX21_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX22)
  */
#define CYREG_PERI_MS_PPU_FX22_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010D80UL)
#define CYREG_PERI_MS_PPU_FX22_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010D84UL)
#define CYREG_PERI_MS_PPU_FX22_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010D90UL)
#define CYREG_PERI_MS_PPU_FX22_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010D94UL)
#define CYREG_PERI_MS_PPU_FX22_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010D98UL)
#define CYREG_PERI_MS_PPU_FX22_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010D9CUL)
#define CYREG_PERI_MS_PPU_FX22_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010DA0UL)
#define CYREG_PERI_MS_PPU_FX22_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010DA4UL)
#define CYREG_PERI_MS_PPU_FX22_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010DB0UL)
#define CYREG_PERI_MS_PPU_FX22_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010DB4UL)
#define CYREG_PERI_MS_PPU_FX22_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010DB8UL)
#define CYREG_PERI_MS_PPU_FX22_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX23)
  */
#define CYREG_PERI_MS_PPU_FX23_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010DC0UL)
#define CYREG_PERI_MS_PPU_FX23_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010DC4UL)
#define CYREG_PERI_MS_PPU_FX23_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010DD0UL)
#define CYREG_PERI_MS_PPU_FX23_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010DD4UL)
#define CYREG_PERI_MS_PPU_FX23_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010DD8UL)
#define CYREG_PERI_MS_PPU_FX23_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010DDCUL)
#define CYREG_PERI_MS_PPU_FX23_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010DE0UL)
#define CYREG_PERI_MS_PPU_FX23_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010DE4UL)
#define CYREG_PERI_MS_PPU_FX23_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010DF0UL)
#define CYREG_PERI_MS_PPU_FX23_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010DF4UL)
#define CYREG_PERI_MS_PPU_FX23_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010DF8UL)
#define CYREG_PERI_MS_PPU_FX23_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX24)
  */
#define CYREG_PERI_MS_PPU_FX24_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010E00UL)
#define CYREG_PERI_MS_PPU_FX24_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010E04UL)
#define CYREG_PERI_MS_PPU_FX24_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010E10UL)
#define CYREG_PERI_MS_PPU_FX24_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010E14UL)
#define CYREG_PERI_MS_PPU_FX24_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010E18UL)
#define CYREG_PERI_MS_PPU_FX24_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010E1CUL)
#define CYREG_PERI_MS_PPU_FX24_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010E20UL)
#define CYREG_PERI_MS_PPU_FX24_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010E24UL)
#define CYREG_PERI_MS_PPU_FX24_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010E30UL)
#define CYREG_PERI_MS_PPU_FX24_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010E34UL)
#define CYREG_PERI_MS_PPU_FX24_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010E38UL)
#define CYREG_PERI_MS_PPU_FX24_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX25)
  */
#define CYREG_PERI_MS_PPU_FX25_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010E40UL)
#define CYREG_PERI_MS_PPU_FX25_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010E44UL)
#define CYREG_PERI_MS_PPU_FX25_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010E50UL)
#define CYREG_PERI_MS_PPU_FX25_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010E54UL)
#define CYREG_PERI_MS_PPU_FX25_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010E58UL)
#define CYREG_PERI_MS_PPU_FX25_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010E5CUL)
#define CYREG_PERI_MS_PPU_FX25_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010E60UL)
#define CYREG_PERI_MS_PPU_FX25_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010E64UL)
#define CYREG_PERI_MS_PPU_FX25_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010E70UL)
#define CYREG_PERI_MS_PPU_FX25_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010E74UL)
#define CYREG_PERI_MS_PPU_FX25_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010E78UL)
#define CYREG_PERI_MS_PPU_FX25_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX26)
  */
#define CYREG_PERI_MS_PPU_FX26_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010E80UL)
#define CYREG_PERI_MS_PPU_FX26_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010E84UL)
#define CYREG_PERI_MS_PPU_FX26_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010E90UL)
#define CYREG_PERI_MS_PPU_FX26_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010E94UL)
#define CYREG_PERI_MS_PPU_FX26_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010E98UL)
#define CYREG_PERI_MS_PPU_FX26_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010E9CUL)
#define CYREG_PERI_MS_PPU_FX26_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010EA0UL)
#define CYREG_PERI_MS_PPU_FX26_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010EA4UL)
#define CYREG_PERI_MS_PPU_FX26_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010EB0UL)
#define CYREG_PERI_MS_PPU_FX26_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010EB4UL)
#define CYREG_PERI_MS_PPU_FX26_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010EB8UL)
#define CYREG_PERI_MS_PPU_FX26_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX27)
  */
#define CYREG_PERI_MS_PPU_FX27_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010EC0UL)
#define CYREG_PERI_MS_PPU_FX27_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010EC4UL)
#define CYREG_PERI_MS_PPU_FX27_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010ED0UL)
#define CYREG_PERI_MS_PPU_FX27_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010ED4UL)
#define CYREG_PERI_MS_PPU_FX27_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010ED8UL)
#define CYREG_PERI_MS_PPU_FX27_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010EDCUL)
#define CYREG_PERI_MS_PPU_FX27_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010EE0UL)
#define CYREG_PERI_MS_PPU_FX27_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010EE4UL)
#define CYREG_PERI_MS_PPU_FX27_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010EF0UL)
#define CYREG_PERI_MS_PPU_FX27_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010EF4UL)
#define CYREG_PERI_MS_PPU_FX27_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010EF8UL)
#define CYREG_PERI_MS_PPU_FX27_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX28)
  */
#define CYREG_PERI_MS_PPU_FX28_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010F00UL)
#define CYREG_PERI_MS_PPU_FX28_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010F04UL)
#define CYREG_PERI_MS_PPU_FX28_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010F10UL)
#define CYREG_PERI_MS_PPU_FX28_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010F14UL)
#define CYREG_PERI_MS_PPU_FX28_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010F18UL)
#define CYREG_PERI_MS_PPU_FX28_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010F1CUL)
#define CYREG_PERI_MS_PPU_FX28_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010F20UL)
#define CYREG_PERI_MS_PPU_FX28_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010F24UL)
#define CYREG_PERI_MS_PPU_FX28_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010F30UL)
#define CYREG_PERI_MS_PPU_FX28_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010F34UL)
#define CYREG_PERI_MS_PPU_FX28_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010F38UL)
#define CYREG_PERI_MS_PPU_FX28_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX29)
  */
#define CYREG_PERI_MS_PPU_FX29_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010F40UL)
#define CYREG_PERI_MS_PPU_FX29_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010F44UL)
#define CYREG_PERI_MS_PPU_FX29_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010F50UL)
#define CYREG_PERI_MS_PPU_FX29_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010F54UL)
#define CYREG_PERI_MS_PPU_FX29_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010F58UL)
#define CYREG_PERI_MS_PPU_FX29_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010F5CUL)
#define CYREG_PERI_MS_PPU_FX29_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010F60UL)
#define CYREG_PERI_MS_PPU_FX29_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010F64UL)
#define CYREG_PERI_MS_PPU_FX29_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010F70UL)
#define CYREG_PERI_MS_PPU_FX29_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010F74UL)
#define CYREG_PERI_MS_PPU_FX29_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010F78UL)
#define CYREG_PERI_MS_PPU_FX29_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX30)
  */
#define CYREG_PERI_MS_PPU_FX30_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010F80UL)
#define CYREG_PERI_MS_PPU_FX30_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010F84UL)
#define CYREG_PERI_MS_PPU_FX30_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010F90UL)
#define CYREG_PERI_MS_PPU_FX30_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010F94UL)
#define CYREG_PERI_MS_PPU_FX30_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010F98UL)
#define CYREG_PERI_MS_PPU_FX30_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010F9CUL)
#define CYREG_PERI_MS_PPU_FX30_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010FA0UL)
#define CYREG_PERI_MS_PPU_FX30_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010FA4UL)
#define CYREG_PERI_MS_PPU_FX30_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010FB0UL)
#define CYREG_PERI_MS_PPU_FX30_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010FB4UL)
#define CYREG_PERI_MS_PPU_FX30_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010FB8UL)
#define CYREG_PERI_MS_PPU_FX30_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX31)
  */
#define CYREG_PERI_MS_PPU_FX31_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40010FC0UL)
#define CYREG_PERI_MS_PPU_FX31_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40010FC4UL)
#define CYREG_PERI_MS_PPU_FX31_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40010FD0UL)
#define CYREG_PERI_MS_PPU_FX31_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40010FD4UL)
#define CYREG_PERI_MS_PPU_FX31_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40010FD8UL)
#define CYREG_PERI_MS_PPU_FX31_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40010FDCUL)
#define CYREG_PERI_MS_PPU_FX31_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40010FE0UL)
#define CYREG_PERI_MS_PPU_FX31_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40010FE4UL)
#define CYREG_PERI_MS_PPU_FX31_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40010FF0UL)
#define CYREG_PERI_MS_PPU_FX31_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40010FF4UL)
#define CYREG_PERI_MS_PPU_FX31_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40010FF8UL)
#define CYREG_PERI_MS_PPU_FX31_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40010FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX32)
  */
#define CYREG_PERI_MS_PPU_FX32_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011000UL)
#define CYREG_PERI_MS_PPU_FX32_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011004UL)
#define CYREG_PERI_MS_PPU_FX32_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011010UL)
#define CYREG_PERI_MS_PPU_FX32_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011014UL)
#define CYREG_PERI_MS_PPU_FX32_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011018UL)
#define CYREG_PERI_MS_PPU_FX32_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001101CUL)
#define CYREG_PERI_MS_PPU_FX32_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011020UL)
#define CYREG_PERI_MS_PPU_FX32_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011024UL)
#define CYREG_PERI_MS_PPU_FX32_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011030UL)
#define CYREG_PERI_MS_PPU_FX32_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011034UL)
#define CYREG_PERI_MS_PPU_FX32_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011038UL)
#define CYREG_PERI_MS_PPU_FX32_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001103CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX33)
  */
#define CYREG_PERI_MS_PPU_FX33_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011040UL)
#define CYREG_PERI_MS_PPU_FX33_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011044UL)
#define CYREG_PERI_MS_PPU_FX33_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011050UL)
#define CYREG_PERI_MS_PPU_FX33_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011054UL)
#define CYREG_PERI_MS_PPU_FX33_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011058UL)
#define CYREG_PERI_MS_PPU_FX33_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001105CUL)
#define CYREG_PERI_MS_PPU_FX33_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011060UL)
#define CYREG_PERI_MS_PPU_FX33_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011064UL)
#define CYREG_PERI_MS_PPU_FX33_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011070UL)
#define CYREG_PERI_MS_PPU_FX33_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011074UL)
#define CYREG_PERI_MS_PPU_FX33_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011078UL)
#define CYREG_PERI_MS_PPU_FX33_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001107CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX34)
  */
#define CYREG_PERI_MS_PPU_FX34_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011080UL)
#define CYREG_PERI_MS_PPU_FX34_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011084UL)
#define CYREG_PERI_MS_PPU_FX34_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011090UL)
#define CYREG_PERI_MS_PPU_FX34_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011094UL)
#define CYREG_PERI_MS_PPU_FX34_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011098UL)
#define CYREG_PERI_MS_PPU_FX34_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001109CUL)
#define CYREG_PERI_MS_PPU_FX34_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400110A0UL)
#define CYREG_PERI_MS_PPU_FX34_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400110A4UL)
#define CYREG_PERI_MS_PPU_FX34_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400110B0UL)
#define CYREG_PERI_MS_PPU_FX34_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400110B4UL)
#define CYREG_PERI_MS_PPU_FX34_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400110B8UL)
#define CYREG_PERI_MS_PPU_FX34_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400110BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX35)
  */
#define CYREG_PERI_MS_PPU_FX35_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400110C0UL)
#define CYREG_PERI_MS_PPU_FX35_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400110C4UL)
#define CYREG_PERI_MS_PPU_FX35_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400110D0UL)
#define CYREG_PERI_MS_PPU_FX35_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400110D4UL)
#define CYREG_PERI_MS_PPU_FX35_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400110D8UL)
#define CYREG_PERI_MS_PPU_FX35_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400110DCUL)
#define CYREG_PERI_MS_PPU_FX35_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400110E0UL)
#define CYREG_PERI_MS_PPU_FX35_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400110E4UL)
#define CYREG_PERI_MS_PPU_FX35_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400110F0UL)
#define CYREG_PERI_MS_PPU_FX35_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400110F4UL)
#define CYREG_PERI_MS_PPU_FX35_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400110F8UL)
#define CYREG_PERI_MS_PPU_FX35_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400110FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX36)
  */
#define CYREG_PERI_MS_PPU_FX36_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011100UL)
#define CYREG_PERI_MS_PPU_FX36_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011104UL)
#define CYREG_PERI_MS_PPU_FX36_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011110UL)
#define CYREG_PERI_MS_PPU_FX36_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011114UL)
#define CYREG_PERI_MS_PPU_FX36_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011118UL)
#define CYREG_PERI_MS_PPU_FX36_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001111CUL)
#define CYREG_PERI_MS_PPU_FX36_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011120UL)
#define CYREG_PERI_MS_PPU_FX36_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011124UL)
#define CYREG_PERI_MS_PPU_FX36_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011130UL)
#define CYREG_PERI_MS_PPU_FX36_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011134UL)
#define CYREG_PERI_MS_PPU_FX36_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011138UL)
#define CYREG_PERI_MS_PPU_FX36_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001113CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX37)
  */
#define CYREG_PERI_MS_PPU_FX37_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011140UL)
#define CYREG_PERI_MS_PPU_FX37_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011144UL)
#define CYREG_PERI_MS_PPU_FX37_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011150UL)
#define CYREG_PERI_MS_PPU_FX37_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011154UL)
#define CYREG_PERI_MS_PPU_FX37_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011158UL)
#define CYREG_PERI_MS_PPU_FX37_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001115CUL)
#define CYREG_PERI_MS_PPU_FX37_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011160UL)
#define CYREG_PERI_MS_PPU_FX37_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011164UL)
#define CYREG_PERI_MS_PPU_FX37_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011170UL)
#define CYREG_PERI_MS_PPU_FX37_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011174UL)
#define CYREG_PERI_MS_PPU_FX37_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011178UL)
#define CYREG_PERI_MS_PPU_FX37_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001117CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX38)
  */
#define CYREG_PERI_MS_PPU_FX38_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011180UL)
#define CYREG_PERI_MS_PPU_FX38_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011184UL)
#define CYREG_PERI_MS_PPU_FX38_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011190UL)
#define CYREG_PERI_MS_PPU_FX38_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011194UL)
#define CYREG_PERI_MS_PPU_FX38_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011198UL)
#define CYREG_PERI_MS_PPU_FX38_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001119CUL)
#define CYREG_PERI_MS_PPU_FX38_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400111A0UL)
#define CYREG_PERI_MS_PPU_FX38_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400111A4UL)
#define CYREG_PERI_MS_PPU_FX38_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400111B0UL)
#define CYREG_PERI_MS_PPU_FX38_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400111B4UL)
#define CYREG_PERI_MS_PPU_FX38_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400111B8UL)
#define CYREG_PERI_MS_PPU_FX38_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400111BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX39)
  */
#define CYREG_PERI_MS_PPU_FX39_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400111C0UL)
#define CYREG_PERI_MS_PPU_FX39_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400111C4UL)
#define CYREG_PERI_MS_PPU_FX39_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400111D0UL)
#define CYREG_PERI_MS_PPU_FX39_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400111D4UL)
#define CYREG_PERI_MS_PPU_FX39_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400111D8UL)
#define CYREG_PERI_MS_PPU_FX39_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400111DCUL)
#define CYREG_PERI_MS_PPU_FX39_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400111E0UL)
#define CYREG_PERI_MS_PPU_FX39_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400111E4UL)
#define CYREG_PERI_MS_PPU_FX39_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400111F0UL)
#define CYREG_PERI_MS_PPU_FX39_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400111F4UL)
#define CYREG_PERI_MS_PPU_FX39_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400111F8UL)
#define CYREG_PERI_MS_PPU_FX39_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400111FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX40)
  */
#define CYREG_PERI_MS_PPU_FX40_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011200UL)
#define CYREG_PERI_MS_PPU_FX40_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011204UL)
#define CYREG_PERI_MS_PPU_FX40_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011210UL)
#define CYREG_PERI_MS_PPU_FX40_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011214UL)
#define CYREG_PERI_MS_PPU_FX40_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011218UL)
#define CYREG_PERI_MS_PPU_FX40_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001121CUL)
#define CYREG_PERI_MS_PPU_FX40_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011220UL)
#define CYREG_PERI_MS_PPU_FX40_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011224UL)
#define CYREG_PERI_MS_PPU_FX40_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011230UL)
#define CYREG_PERI_MS_PPU_FX40_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011234UL)
#define CYREG_PERI_MS_PPU_FX40_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011238UL)
#define CYREG_PERI_MS_PPU_FX40_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001123CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX41)
  */
#define CYREG_PERI_MS_PPU_FX41_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011240UL)
#define CYREG_PERI_MS_PPU_FX41_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011244UL)
#define CYREG_PERI_MS_PPU_FX41_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011250UL)
#define CYREG_PERI_MS_PPU_FX41_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011254UL)
#define CYREG_PERI_MS_PPU_FX41_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011258UL)
#define CYREG_PERI_MS_PPU_FX41_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001125CUL)
#define CYREG_PERI_MS_PPU_FX41_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011260UL)
#define CYREG_PERI_MS_PPU_FX41_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011264UL)
#define CYREG_PERI_MS_PPU_FX41_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011270UL)
#define CYREG_PERI_MS_PPU_FX41_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011274UL)
#define CYREG_PERI_MS_PPU_FX41_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011278UL)
#define CYREG_PERI_MS_PPU_FX41_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001127CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX42)
  */
#define CYREG_PERI_MS_PPU_FX42_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011280UL)
#define CYREG_PERI_MS_PPU_FX42_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011284UL)
#define CYREG_PERI_MS_PPU_FX42_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011290UL)
#define CYREG_PERI_MS_PPU_FX42_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011294UL)
#define CYREG_PERI_MS_PPU_FX42_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011298UL)
#define CYREG_PERI_MS_PPU_FX42_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001129CUL)
#define CYREG_PERI_MS_PPU_FX42_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400112A0UL)
#define CYREG_PERI_MS_PPU_FX42_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400112A4UL)
#define CYREG_PERI_MS_PPU_FX42_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400112B0UL)
#define CYREG_PERI_MS_PPU_FX42_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400112B4UL)
#define CYREG_PERI_MS_PPU_FX42_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400112B8UL)
#define CYREG_PERI_MS_PPU_FX42_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400112BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX43)
  */
#define CYREG_PERI_MS_PPU_FX43_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400112C0UL)
#define CYREG_PERI_MS_PPU_FX43_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400112C4UL)
#define CYREG_PERI_MS_PPU_FX43_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400112D0UL)
#define CYREG_PERI_MS_PPU_FX43_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400112D4UL)
#define CYREG_PERI_MS_PPU_FX43_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400112D8UL)
#define CYREG_PERI_MS_PPU_FX43_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400112DCUL)
#define CYREG_PERI_MS_PPU_FX43_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400112E0UL)
#define CYREG_PERI_MS_PPU_FX43_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400112E4UL)
#define CYREG_PERI_MS_PPU_FX43_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400112F0UL)
#define CYREG_PERI_MS_PPU_FX43_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400112F4UL)
#define CYREG_PERI_MS_PPU_FX43_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400112F8UL)
#define CYREG_PERI_MS_PPU_FX43_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400112FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX44)
  */
#define CYREG_PERI_MS_PPU_FX44_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011300UL)
#define CYREG_PERI_MS_PPU_FX44_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011304UL)
#define CYREG_PERI_MS_PPU_FX44_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011310UL)
#define CYREG_PERI_MS_PPU_FX44_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011314UL)
#define CYREG_PERI_MS_PPU_FX44_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011318UL)
#define CYREG_PERI_MS_PPU_FX44_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001131CUL)
#define CYREG_PERI_MS_PPU_FX44_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011320UL)
#define CYREG_PERI_MS_PPU_FX44_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011324UL)
#define CYREG_PERI_MS_PPU_FX44_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011330UL)
#define CYREG_PERI_MS_PPU_FX44_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011334UL)
#define CYREG_PERI_MS_PPU_FX44_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011338UL)
#define CYREG_PERI_MS_PPU_FX44_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001133CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX45)
  */
#define CYREG_PERI_MS_PPU_FX45_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011340UL)
#define CYREG_PERI_MS_PPU_FX45_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011344UL)
#define CYREG_PERI_MS_PPU_FX45_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011350UL)
#define CYREG_PERI_MS_PPU_FX45_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011354UL)
#define CYREG_PERI_MS_PPU_FX45_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011358UL)
#define CYREG_PERI_MS_PPU_FX45_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001135CUL)
#define CYREG_PERI_MS_PPU_FX45_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011360UL)
#define CYREG_PERI_MS_PPU_FX45_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011364UL)
#define CYREG_PERI_MS_PPU_FX45_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011370UL)
#define CYREG_PERI_MS_PPU_FX45_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011374UL)
#define CYREG_PERI_MS_PPU_FX45_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011378UL)
#define CYREG_PERI_MS_PPU_FX45_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001137CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX46)
  */
#define CYREG_PERI_MS_PPU_FX46_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011380UL)
#define CYREG_PERI_MS_PPU_FX46_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011384UL)
#define CYREG_PERI_MS_PPU_FX46_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011390UL)
#define CYREG_PERI_MS_PPU_FX46_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011394UL)
#define CYREG_PERI_MS_PPU_FX46_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011398UL)
#define CYREG_PERI_MS_PPU_FX46_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001139CUL)
#define CYREG_PERI_MS_PPU_FX46_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400113A0UL)
#define CYREG_PERI_MS_PPU_FX46_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400113A4UL)
#define CYREG_PERI_MS_PPU_FX46_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400113B0UL)
#define CYREG_PERI_MS_PPU_FX46_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400113B4UL)
#define CYREG_PERI_MS_PPU_FX46_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400113B8UL)
#define CYREG_PERI_MS_PPU_FX46_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400113BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX47)
  */
#define CYREG_PERI_MS_PPU_FX47_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400113C0UL)
#define CYREG_PERI_MS_PPU_FX47_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400113C4UL)
#define CYREG_PERI_MS_PPU_FX47_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400113D0UL)
#define CYREG_PERI_MS_PPU_FX47_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400113D4UL)
#define CYREG_PERI_MS_PPU_FX47_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400113D8UL)
#define CYREG_PERI_MS_PPU_FX47_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400113DCUL)
#define CYREG_PERI_MS_PPU_FX47_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400113E0UL)
#define CYREG_PERI_MS_PPU_FX47_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400113E4UL)
#define CYREG_PERI_MS_PPU_FX47_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400113F0UL)
#define CYREG_PERI_MS_PPU_FX47_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400113F4UL)
#define CYREG_PERI_MS_PPU_FX47_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400113F8UL)
#define CYREG_PERI_MS_PPU_FX47_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400113FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX48)
  */
#define CYREG_PERI_MS_PPU_FX48_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011400UL)
#define CYREG_PERI_MS_PPU_FX48_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011404UL)
#define CYREG_PERI_MS_PPU_FX48_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011410UL)
#define CYREG_PERI_MS_PPU_FX48_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011414UL)
#define CYREG_PERI_MS_PPU_FX48_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011418UL)
#define CYREG_PERI_MS_PPU_FX48_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001141CUL)
#define CYREG_PERI_MS_PPU_FX48_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011420UL)
#define CYREG_PERI_MS_PPU_FX48_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011424UL)
#define CYREG_PERI_MS_PPU_FX48_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011430UL)
#define CYREG_PERI_MS_PPU_FX48_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011434UL)
#define CYREG_PERI_MS_PPU_FX48_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011438UL)
#define CYREG_PERI_MS_PPU_FX48_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001143CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX49)
  */
#define CYREG_PERI_MS_PPU_FX49_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011440UL)
#define CYREG_PERI_MS_PPU_FX49_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011444UL)
#define CYREG_PERI_MS_PPU_FX49_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011450UL)
#define CYREG_PERI_MS_PPU_FX49_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011454UL)
#define CYREG_PERI_MS_PPU_FX49_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011458UL)
#define CYREG_PERI_MS_PPU_FX49_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001145CUL)
#define CYREG_PERI_MS_PPU_FX49_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011460UL)
#define CYREG_PERI_MS_PPU_FX49_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011464UL)
#define CYREG_PERI_MS_PPU_FX49_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011470UL)
#define CYREG_PERI_MS_PPU_FX49_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011474UL)
#define CYREG_PERI_MS_PPU_FX49_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011478UL)
#define CYREG_PERI_MS_PPU_FX49_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001147CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX50)
  */
#define CYREG_PERI_MS_PPU_FX50_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011480UL)
#define CYREG_PERI_MS_PPU_FX50_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011484UL)
#define CYREG_PERI_MS_PPU_FX50_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011490UL)
#define CYREG_PERI_MS_PPU_FX50_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011494UL)
#define CYREG_PERI_MS_PPU_FX50_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011498UL)
#define CYREG_PERI_MS_PPU_FX50_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001149CUL)
#define CYREG_PERI_MS_PPU_FX50_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400114A0UL)
#define CYREG_PERI_MS_PPU_FX50_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400114A4UL)
#define CYREG_PERI_MS_PPU_FX50_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400114B0UL)
#define CYREG_PERI_MS_PPU_FX50_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400114B4UL)
#define CYREG_PERI_MS_PPU_FX50_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400114B8UL)
#define CYREG_PERI_MS_PPU_FX50_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400114BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX51)
  */
#define CYREG_PERI_MS_PPU_FX51_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400114C0UL)
#define CYREG_PERI_MS_PPU_FX51_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400114C4UL)
#define CYREG_PERI_MS_PPU_FX51_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400114D0UL)
#define CYREG_PERI_MS_PPU_FX51_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400114D4UL)
#define CYREG_PERI_MS_PPU_FX51_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400114D8UL)
#define CYREG_PERI_MS_PPU_FX51_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400114DCUL)
#define CYREG_PERI_MS_PPU_FX51_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400114E0UL)
#define CYREG_PERI_MS_PPU_FX51_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400114E4UL)
#define CYREG_PERI_MS_PPU_FX51_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400114F0UL)
#define CYREG_PERI_MS_PPU_FX51_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400114F4UL)
#define CYREG_PERI_MS_PPU_FX51_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400114F8UL)
#define CYREG_PERI_MS_PPU_FX51_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400114FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX52)
  */
#define CYREG_PERI_MS_PPU_FX52_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011500UL)
#define CYREG_PERI_MS_PPU_FX52_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011504UL)
#define CYREG_PERI_MS_PPU_FX52_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011510UL)
#define CYREG_PERI_MS_PPU_FX52_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011514UL)
#define CYREG_PERI_MS_PPU_FX52_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011518UL)
#define CYREG_PERI_MS_PPU_FX52_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001151CUL)
#define CYREG_PERI_MS_PPU_FX52_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011520UL)
#define CYREG_PERI_MS_PPU_FX52_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011524UL)
#define CYREG_PERI_MS_PPU_FX52_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011530UL)
#define CYREG_PERI_MS_PPU_FX52_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011534UL)
#define CYREG_PERI_MS_PPU_FX52_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011538UL)
#define CYREG_PERI_MS_PPU_FX52_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001153CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX53)
  */
#define CYREG_PERI_MS_PPU_FX53_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011540UL)
#define CYREG_PERI_MS_PPU_FX53_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011544UL)
#define CYREG_PERI_MS_PPU_FX53_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011550UL)
#define CYREG_PERI_MS_PPU_FX53_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011554UL)
#define CYREG_PERI_MS_PPU_FX53_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011558UL)
#define CYREG_PERI_MS_PPU_FX53_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001155CUL)
#define CYREG_PERI_MS_PPU_FX53_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011560UL)
#define CYREG_PERI_MS_PPU_FX53_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011564UL)
#define CYREG_PERI_MS_PPU_FX53_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011570UL)
#define CYREG_PERI_MS_PPU_FX53_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011574UL)
#define CYREG_PERI_MS_PPU_FX53_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011578UL)
#define CYREG_PERI_MS_PPU_FX53_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001157CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX54)
  */
#define CYREG_PERI_MS_PPU_FX54_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011580UL)
#define CYREG_PERI_MS_PPU_FX54_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011584UL)
#define CYREG_PERI_MS_PPU_FX54_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011590UL)
#define CYREG_PERI_MS_PPU_FX54_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011594UL)
#define CYREG_PERI_MS_PPU_FX54_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011598UL)
#define CYREG_PERI_MS_PPU_FX54_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001159CUL)
#define CYREG_PERI_MS_PPU_FX54_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400115A0UL)
#define CYREG_PERI_MS_PPU_FX54_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400115A4UL)
#define CYREG_PERI_MS_PPU_FX54_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400115B0UL)
#define CYREG_PERI_MS_PPU_FX54_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400115B4UL)
#define CYREG_PERI_MS_PPU_FX54_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400115B8UL)
#define CYREG_PERI_MS_PPU_FX54_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400115BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX55)
  */
#define CYREG_PERI_MS_PPU_FX55_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400115C0UL)
#define CYREG_PERI_MS_PPU_FX55_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400115C4UL)
#define CYREG_PERI_MS_PPU_FX55_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400115D0UL)
#define CYREG_PERI_MS_PPU_FX55_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400115D4UL)
#define CYREG_PERI_MS_PPU_FX55_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400115D8UL)
#define CYREG_PERI_MS_PPU_FX55_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400115DCUL)
#define CYREG_PERI_MS_PPU_FX55_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400115E0UL)
#define CYREG_PERI_MS_PPU_FX55_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400115E4UL)
#define CYREG_PERI_MS_PPU_FX55_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400115F0UL)
#define CYREG_PERI_MS_PPU_FX55_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400115F4UL)
#define CYREG_PERI_MS_PPU_FX55_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400115F8UL)
#define CYREG_PERI_MS_PPU_FX55_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400115FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX56)
  */
#define CYREG_PERI_MS_PPU_FX56_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011600UL)
#define CYREG_PERI_MS_PPU_FX56_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011604UL)
#define CYREG_PERI_MS_PPU_FX56_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011610UL)
#define CYREG_PERI_MS_PPU_FX56_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011614UL)
#define CYREG_PERI_MS_PPU_FX56_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011618UL)
#define CYREG_PERI_MS_PPU_FX56_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001161CUL)
#define CYREG_PERI_MS_PPU_FX56_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011620UL)
#define CYREG_PERI_MS_PPU_FX56_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011624UL)
#define CYREG_PERI_MS_PPU_FX56_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011630UL)
#define CYREG_PERI_MS_PPU_FX56_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011634UL)
#define CYREG_PERI_MS_PPU_FX56_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011638UL)
#define CYREG_PERI_MS_PPU_FX56_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001163CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX57)
  */
#define CYREG_PERI_MS_PPU_FX57_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011640UL)
#define CYREG_PERI_MS_PPU_FX57_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011644UL)
#define CYREG_PERI_MS_PPU_FX57_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011650UL)
#define CYREG_PERI_MS_PPU_FX57_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011654UL)
#define CYREG_PERI_MS_PPU_FX57_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011658UL)
#define CYREG_PERI_MS_PPU_FX57_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001165CUL)
#define CYREG_PERI_MS_PPU_FX57_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011660UL)
#define CYREG_PERI_MS_PPU_FX57_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011664UL)
#define CYREG_PERI_MS_PPU_FX57_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011670UL)
#define CYREG_PERI_MS_PPU_FX57_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011674UL)
#define CYREG_PERI_MS_PPU_FX57_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011678UL)
#define CYREG_PERI_MS_PPU_FX57_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001167CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX58)
  */
#define CYREG_PERI_MS_PPU_FX58_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011680UL)
#define CYREG_PERI_MS_PPU_FX58_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011684UL)
#define CYREG_PERI_MS_PPU_FX58_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011690UL)
#define CYREG_PERI_MS_PPU_FX58_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011694UL)
#define CYREG_PERI_MS_PPU_FX58_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011698UL)
#define CYREG_PERI_MS_PPU_FX58_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001169CUL)
#define CYREG_PERI_MS_PPU_FX58_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400116A0UL)
#define CYREG_PERI_MS_PPU_FX58_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400116A4UL)
#define CYREG_PERI_MS_PPU_FX58_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400116B0UL)
#define CYREG_PERI_MS_PPU_FX58_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400116B4UL)
#define CYREG_PERI_MS_PPU_FX58_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400116B8UL)
#define CYREG_PERI_MS_PPU_FX58_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400116BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX59)
  */
#define CYREG_PERI_MS_PPU_FX59_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400116C0UL)
#define CYREG_PERI_MS_PPU_FX59_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400116C4UL)
#define CYREG_PERI_MS_PPU_FX59_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400116D0UL)
#define CYREG_PERI_MS_PPU_FX59_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400116D4UL)
#define CYREG_PERI_MS_PPU_FX59_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400116D8UL)
#define CYREG_PERI_MS_PPU_FX59_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400116DCUL)
#define CYREG_PERI_MS_PPU_FX59_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400116E0UL)
#define CYREG_PERI_MS_PPU_FX59_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400116E4UL)
#define CYREG_PERI_MS_PPU_FX59_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400116F0UL)
#define CYREG_PERI_MS_PPU_FX59_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400116F4UL)
#define CYREG_PERI_MS_PPU_FX59_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400116F8UL)
#define CYREG_PERI_MS_PPU_FX59_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400116FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX60)
  */
#define CYREG_PERI_MS_PPU_FX60_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011700UL)
#define CYREG_PERI_MS_PPU_FX60_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011704UL)
#define CYREG_PERI_MS_PPU_FX60_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011710UL)
#define CYREG_PERI_MS_PPU_FX60_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011714UL)
#define CYREG_PERI_MS_PPU_FX60_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011718UL)
#define CYREG_PERI_MS_PPU_FX60_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001171CUL)
#define CYREG_PERI_MS_PPU_FX60_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011720UL)
#define CYREG_PERI_MS_PPU_FX60_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011724UL)
#define CYREG_PERI_MS_PPU_FX60_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011730UL)
#define CYREG_PERI_MS_PPU_FX60_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011734UL)
#define CYREG_PERI_MS_PPU_FX60_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011738UL)
#define CYREG_PERI_MS_PPU_FX60_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001173CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX61)
  */
#define CYREG_PERI_MS_PPU_FX61_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011740UL)
#define CYREG_PERI_MS_PPU_FX61_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011744UL)
#define CYREG_PERI_MS_PPU_FX61_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011750UL)
#define CYREG_PERI_MS_PPU_FX61_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011754UL)
#define CYREG_PERI_MS_PPU_FX61_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011758UL)
#define CYREG_PERI_MS_PPU_FX61_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001175CUL)
#define CYREG_PERI_MS_PPU_FX61_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011760UL)
#define CYREG_PERI_MS_PPU_FX61_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011764UL)
#define CYREG_PERI_MS_PPU_FX61_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011770UL)
#define CYREG_PERI_MS_PPU_FX61_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011774UL)
#define CYREG_PERI_MS_PPU_FX61_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011778UL)
#define CYREG_PERI_MS_PPU_FX61_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001177CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX62)
  */
#define CYREG_PERI_MS_PPU_FX62_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011780UL)
#define CYREG_PERI_MS_PPU_FX62_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011784UL)
#define CYREG_PERI_MS_PPU_FX62_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011790UL)
#define CYREG_PERI_MS_PPU_FX62_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011794UL)
#define CYREG_PERI_MS_PPU_FX62_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011798UL)
#define CYREG_PERI_MS_PPU_FX62_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001179CUL)
#define CYREG_PERI_MS_PPU_FX62_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400117A0UL)
#define CYREG_PERI_MS_PPU_FX62_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400117A4UL)
#define CYREG_PERI_MS_PPU_FX62_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400117B0UL)
#define CYREG_PERI_MS_PPU_FX62_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400117B4UL)
#define CYREG_PERI_MS_PPU_FX62_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400117B8UL)
#define CYREG_PERI_MS_PPU_FX62_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400117BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX63)
  */
#define CYREG_PERI_MS_PPU_FX63_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400117C0UL)
#define CYREG_PERI_MS_PPU_FX63_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400117C4UL)
#define CYREG_PERI_MS_PPU_FX63_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400117D0UL)
#define CYREG_PERI_MS_PPU_FX63_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400117D4UL)
#define CYREG_PERI_MS_PPU_FX63_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400117D8UL)
#define CYREG_PERI_MS_PPU_FX63_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400117DCUL)
#define CYREG_PERI_MS_PPU_FX63_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400117E0UL)
#define CYREG_PERI_MS_PPU_FX63_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400117E4UL)
#define CYREG_PERI_MS_PPU_FX63_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400117F0UL)
#define CYREG_PERI_MS_PPU_FX63_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400117F4UL)
#define CYREG_PERI_MS_PPU_FX63_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400117F8UL)
#define CYREG_PERI_MS_PPU_FX63_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400117FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX64)
  */
#define CYREG_PERI_MS_PPU_FX64_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011800UL)
#define CYREG_PERI_MS_PPU_FX64_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011804UL)
#define CYREG_PERI_MS_PPU_FX64_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011810UL)
#define CYREG_PERI_MS_PPU_FX64_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011814UL)
#define CYREG_PERI_MS_PPU_FX64_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011818UL)
#define CYREG_PERI_MS_PPU_FX64_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001181CUL)
#define CYREG_PERI_MS_PPU_FX64_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011820UL)
#define CYREG_PERI_MS_PPU_FX64_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011824UL)
#define CYREG_PERI_MS_PPU_FX64_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011830UL)
#define CYREG_PERI_MS_PPU_FX64_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011834UL)
#define CYREG_PERI_MS_PPU_FX64_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011838UL)
#define CYREG_PERI_MS_PPU_FX64_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001183CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX65)
  */
#define CYREG_PERI_MS_PPU_FX65_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011840UL)
#define CYREG_PERI_MS_PPU_FX65_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011844UL)
#define CYREG_PERI_MS_PPU_FX65_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011850UL)
#define CYREG_PERI_MS_PPU_FX65_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011854UL)
#define CYREG_PERI_MS_PPU_FX65_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011858UL)
#define CYREG_PERI_MS_PPU_FX65_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001185CUL)
#define CYREG_PERI_MS_PPU_FX65_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011860UL)
#define CYREG_PERI_MS_PPU_FX65_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011864UL)
#define CYREG_PERI_MS_PPU_FX65_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011870UL)
#define CYREG_PERI_MS_PPU_FX65_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011874UL)
#define CYREG_PERI_MS_PPU_FX65_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011878UL)
#define CYREG_PERI_MS_PPU_FX65_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001187CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX66)
  */
#define CYREG_PERI_MS_PPU_FX66_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011880UL)
#define CYREG_PERI_MS_PPU_FX66_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011884UL)
#define CYREG_PERI_MS_PPU_FX66_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011890UL)
#define CYREG_PERI_MS_PPU_FX66_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011894UL)
#define CYREG_PERI_MS_PPU_FX66_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011898UL)
#define CYREG_PERI_MS_PPU_FX66_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001189CUL)
#define CYREG_PERI_MS_PPU_FX66_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400118A0UL)
#define CYREG_PERI_MS_PPU_FX66_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400118A4UL)
#define CYREG_PERI_MS_PPU_FX66_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400118B0UL)
#define CYREG_PERI_MS_PPU_FX66_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400118B4UL)
#define CYREG_PERI_MS_PPU_FX66_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400118B8UL)
#define CYREG_PERI_MS_PPU_FX66_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400118BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX67)
  */
#define CYREG_PERI_MS_PPU_FX67_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400118C0UL)
#define CYREG_PERI_MS_PPU_FX67_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400118C4UL)
#define CYREG_PERI_MS_PPU_FX67_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400118D0UL)
#define CYREG_PERI_MS_PPU_FX67_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400118D4UL)
#define CYREG_PERI_MS_PPU_FX67_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400118D8UL)
#define CYREG_PERI_MS_PPU_FX67_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400118DCUL)
#define CYREG_PERI_MS_PPU_FX67_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400118E0UL)
#define CYREG_PERI_MS_PPU_FX67_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400118E4UL)
#define CYREG_PERI_MS_PPU_FX67_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400118F0UL)
#define CYREG_PERI_MS_PPU_FX67_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400118F4UL)
#define CYREG_PERI_MS_PPU_FX67_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400118F8UL)
#define CYREG_PERI_MS_PPU_FX67_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400118FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX68)
  */
#define CYREG_PERI_MS_PPU_FX68_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011900UL)
#define CYREG_PERI_MS_PPU_FX68_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011904UL)
#define CYREG_PERI_MS_PPU_FX68_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011910UL)
#define CYREG_PERI_MS_PPU_FX68_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011914UL)
#define CYREG_PERI_MS_PPU_FX68_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011918UL)
#define CYREG_PERI_MS_PPU_FX68_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001191CUL)
#define CYREG_PERI_MS_PPU_FX68_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011920UL)
#define CYREG_PERI_MS_PPU_FX68_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011924UL)
#define CYREG_PERI_MS_PPU_FX68_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011930UL)
#define CYREG_PERI_MS_PPU_FX68_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011934UL)
#define CYREG_PERI_MS_PPU_FX68_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011938UL)
#define CYREG_PERI_MS_PPU_FX68_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001193CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX69)
  */
#define CYREG_PERI_MS_PPU_FX69_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011940UL)
#define CYREG_PERI_MS_PPU_FX69_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011944UL)
#define CYREG_PERI_MS_PPU_FX69_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011950UL)
#define CYREG_PERI_MS_PPU_FX69_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011954UL)
#define CYREG_PERI_MS_PPU_FX69_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011958UL)
#define CYREG_PERI_MS_PPU_FX69_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001195CUL)
#define CYREG_PERI_MS_PPU_FX69_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011960UL)
#define CYREG_PERI_MS_PPU_FX69_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011964UL)
#define CYREG_PERI_MS_PPU_FX69_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011970UL)
#define CYREG_PERI_MS_PPU_FX69_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011974UL)
#define CYREG_PERI_MS_PPU_FX69_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011978UL)
#define CYREG_PERI_MS_PPU_FX69_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001197CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX70)
  */
#define CYREG_PERI_MS_PPU_FX70_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011980UL)
#define CYREG_PERI_MS_PPU_FX70_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011984UL)
#define CYREG_PERI_MS_PPU_FX70_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011990UL)
#define CYREG_PERI_MS_PPU_FX70_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011994UL)
#define CYREG_PERI_MS_PPU_FX70_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011998UL)
#define CYREG_PERI_MS_PPU_FX70_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001199CUL)
#define CYREG_PERI_MS_PPU_FX70_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400119A0UL)
#define CYREG_PERI_MS_PPU_FX70_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400119A4UL)
#define CYREG_PERI_MS_PPU_FX70_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400119B0UL)
#define CYREG_PERI_MS_PPU_FX70_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400119B4UL)
#define CYREG_PERI_MS_PPU_FX70_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400119B8UL)
#define CYREG_PERI_MS_PPU_FX70_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400119BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX71)
  */
#define CYREG_PERI_MS_PPU_FX71_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400119C0UL)
#define CYREG_PERI_MS_PPU_FX71_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400119C4UL)
#define CYREG_PERI_MS_PPU_FX71_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400119D0UL)
#define CYREG_PERI_MS_PPU_FX71_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400119D4UL)
#define CYREG_PERI_MS_PPU_FX71_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400119D8UL)
#define CYREG_PERI_MS_PPU_FX71_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400119DCUL)
#define CYREG_PERI_MS_PPU_FX71_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400119E0UL)
#define CYREG_PERI_MS_PPU_FX71_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400119E4UL)
#define CYREG_PERI_MS_PPU_FX71_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400119F0UL)
#define CYREG_PERI_MS_PPU_FX71_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400119F4UL)
#define CYREG_PERI_MS_PPU_FX71_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400119F8UL)
#define CYREG_PERI_MS_PPU_FX71_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400119FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX72)
  */
#define CYREG_PERI_MS_PPU_FX72_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011A00UL)
#define CYREG_PERI_MS_PPU_FX72_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011A04UL)
#define CYREG_PERI_MS_PPU_FX72_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011A10UL)
#define CYREG_PERI_MS_PPU_FX72_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011A14UL)
#define CYREG_PERI_MS_PPU_FX72_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011A18UL)
#define CYREG_PERI_MS_PPU_FX72_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011A1CUL)
#define CYREG_PERI_MS_PPU_FX72_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011A20UL)
#define CYREG_PERI_MS_PPU_FX72_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011A24UL)
#define CYREG_PERI_MS_PPU_FX72_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011A30UL)
#define CYREG_PERI_MS_PPU_FX72_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011A34UL)
#define CYREG_PERI_MS_PPU_FX72_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011A38UL)
#define CYREG_PERI_MS_PPU_FX72_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX73)
  */
#define CYREG_PERI_MS_PPU_FX73_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011A40UL)
#define CYREG_PERI_MS_PPU_FX73_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011A44UL)
#define CYREG_PERI_MS_PPU_FX73_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011A50UL)
#define CYREG_PERI_MS_PPU_FX73_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011A54UL)
#define CYREG_PERI_MS_PPU_FX73_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011A58UL)
#define CYREG_PERI_MS_PPU_FX73_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011A5CUL)
#define CYREG_PERI_MS_PPU_FX73_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011A60UL)
#define CYREG_PERI_MS_PPU_FX73_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011A64UL)
#define CYREG_PERI_MS_PPU_FX73_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011A70UL)
#define CYREG_PERI_MS_PPU_FX73_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011A74UL)
#define CYREG_PERI_MS_PPU_FX73_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011A78UL)
#define CYREG_PERI_MS_PPU_FX73_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX74)
  */
#define CYREG_PERI_MS_PPU_FX74_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011A80UL)
#define CYREG_PERI_MS_PPU_FX74_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011A84UL)
#define CYREG_PERI_MS_PPU_FX74_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011A90UL)
#define CYREG_PERI_MS_PPU_FX74_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011A94UL)
#define CYREG_PERI_MS_PPU_FX74_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011A98UL)
#define CYREG_PERI_MS_PPU_FX74_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011A9CUL)
#define CYREG_PERI_MS_PPU_FX74_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011AA0UL)
#define CYREG_PERI_MS_PPU_FX74_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011AA4UL)
#define CYREG_PERI_MS_PPU_FX74_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011AB0UL)
#define CYREG_PERI_MS_PPU_FX74_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011AB4UL)
#define CYREG_PERI_MS_PPU_FX74_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011AB8UL)
#define CYREG_PERI_MS_PPU_FX74_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX75)
  */
#define CYREG_PERI_MS_PPU_FX75_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011AC0UL)
#define CYREG_PERI_MS_PPU_FX75_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011AC4UL)
#define CYREG_PERI_MS_PPU_FX75_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011AD0UL)
#define CYREG_PERI_MS_PPU_FX75_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011AD4UL)
#define CYREG_PERI_MS_PPU_FX75_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011AD8UL)
#define CYREG_PERI_MS_PPU_FX75_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011ADCUL)
#define CYREG_PERI_MS_PPU_FX75_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011AE0UL)
#define CYREG_PERI_MS_PPU_FX75_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011AE4UL)
#define CYREG_PERI_MS_PPU_FX75_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011AF0UL)
#define CYREG_PERI_MS_PPU_FX75_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011AF4UL)
#define CYREG_PERI_MS_PPU_FX75_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011AF8UL)
#define CYREG_PERI_MS_PPU_FX75_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX76)
  */
#define CYREG_PERI_MS_PPU_FX76_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011B00UL)
#define CYREG_PERI_MS_PPU_FX76_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011B04UL)
#define CYREG_PERI_MS_PPU_FX76_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011B10UL)
#define CYREG_PERI_MS_PPU_FX76_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011B14UL)
#define CYREG_PERI_MS_PPU_FX76_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011B18UL)
#define CYREG_PERI_MS_PPU_FX76_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011B1CUL)
#define CYREG_PERI_MS_PPU_FX76_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011B20UL)
#define CYREG_PERI_MS_PPU_FX76_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011B24UL)
#define CYREG_PERI_MS_PPU_FX76_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011B30UL)
#define CYREG_PERI_MS_PPU_FX76_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011B34UL)
#define CYREG_PERI_MS_PPU_FX76_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011B38UL)
#define CYREG_PERI_MS_PPU_FX76_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX77)
  */
#define CYREG_PERI_MS_PPU_FX77_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011B40UL)
#define CYREG_PERI_MS_PPU_FX77_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011B44UL)
#define CYREG_PERI_MS_PPU_FX77_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011B50UL)
#define CYREG_PERI_MS_PPU_FX77_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011B54UL)
#define CYREG_PERI_MS_PPU_FX77_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011B58UL)
#define CYREG_PERI_MS_PPU_FX77_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011B5CUL)
#define CYREG_PERI_MS_PPU_FX77_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011B60UL)
#define CYREG_PERI_MS_PPU_FX77_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011B64UL)
#define CYREG_PERI_MS_PPU_FX77_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011B70UL)
#define CYREG_PERI_MS_PPU_FX77_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011B74UL)
#define CYREG_PERI_MS_PPU_FX77_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011B78UL)
#define CYREG_PERI_MS_PPU_FX77_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX78)
  */
#define CYREG_PERI_MS_PPU_FX78_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011B80UL)
#define CYREG_PERI_MS_PPU_FX78_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011B84UL)
#define CYREG_PERI_MS_PPU_FX78_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011B90UL)
#define CYREG_PERI_MS_PPU_FX78_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011B94UL)
#define CYREG_PERI_MS_PPU_FX78_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011B98UL)
#define CYREG_PERI_MS_PPU_FX78_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011B9CUL)
#define CYREG_PERI_MS_PPU_FX78_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011BA0UL)
#define CYREG_PERI_MS_PPU_FX78_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011BA4UL)
#define CYREG_PERI_MS_PPU_FX78_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011BB0UL)
#define CYREG_PERI_MS_PPU_FX78_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011BB4UL)
#define CYREG_PERI_MS_PPU_FX78_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011BB8UL)
#define CYREG_PERI_MS_PPU_FX78_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX79)
  */
#define CYREG_PERI_MS_PPU_FX79_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011BC0UL)
#define CYREG_PERI_MS_PPU_FX79_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011BC4UL)
#define CYREG_PERI_MS_PPU_FX79_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011BD0UL)
#define CYREG_PERI_MS_PPU_FX79_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011BD4UL)
#define CYREG_PERI_MS_PPU_FX79_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011BD8UL)
#define CYREG_PERI_MS_PPU_FX79_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011BDCUL)
#define CYREG_PERI_MS_PPU_FX79_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011BE0UL)
#define CYREG_PERI_MS_PPU_FX79_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011BE4UL)
#define CYREG_PERI_MS_PPU_FX79_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011BF0UL)
#define CYREG_PERI_MS_PPU_FX79_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011BF4UL)
#define CYREG_PERI_MS_PPU_FX79_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011BF8UL)
#define CYREG_PERI_MS_PPU_FX79_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX80)
  */
#define CYREG_PERI_MS_PPU_FX80_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011C00UL)
#define CYREG_PERI_MS_PPU_FX80_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011C04UL)
#define CYREG_PERI_MS_PPU_FX80_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011C10UL)
#define CYREG_PERI_MS_PPU_FX80_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011C14UL)
#define CYREG_PERI_MS_PPU_FX80_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011C18UL)
#define CYREG_PERI_MS_PPU_FX80_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011C1CUL)
#define CYREG_PERI_MS_PPU_FX80_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011C20UL)
#define CYREG_PERI_MS_PPU_FX80_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011C24UL)
#define CYREG_PERI_MS_PPU_FX80_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011C30UL)
#define CYREG_PERI_MS_PPU_FX80_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011C34UL)
#define CYREG_PERI_MS_PPU_FX80_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011C38UL)
#define CYREG_PERI_MS_PPU_FX80_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX81)
  */
#define CYREG_PERI_MS_PPU_FX81_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011C40UL)
#define CYREG_PERI_MS_PPU_FX81_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011C44UL)
#define CYREG_PERI_MS_PPU_FX81_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011C50UL)
#define CYREG_PERI_MS_PPU_FX81_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011C54UL)
#define CYREG_PERI_MS_PPU_FX81_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011C58UL)
#define CYREG_PERI_MS_PPU_FX81_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011C5CUL)
#define CYREG_PERI_MS_PPU_FX81_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011C60UL)
#define CYREG_PERI_MS_PPU_FX81_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011C64UL)
#define CYREG_PERI_MS_PPU_FX81_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011C70UL)
#define CYREG_PERI_MS_PPU_FX81_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011C74UL)
#define CYREG_PERI_MS_PPU_FX81_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011C78UL)
#define CYREG_PERI_MS_PPU_FX81_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX82)
  */
#define CYREG_PERI_MS_PPU_FX82_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011C80UL)
#define CYREG_PERI_MS_PPU_FX82_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011C84UL)
#define CYREG_PERI_MS_PPU_FX82_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011C90UL)
#define CYREG_PERI_MS_PPU_FX82_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011C94UL)
#define CYREG_PERI_MS_PPU_FX82_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011C98UL)
#define CYREG_PERI_MS_PPU_FX82_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011C9CUL)
#define CYREG_PERI_MS_PPU_FX82_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011CA0UL)
#define CYREG_PERI_MS_PPU_FX82_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011CA4UL)
#define CYREG_PERI_MS_PPU_FX82_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011CB0UL)
#define CYREG_PERI_MS_PPU_FX82_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011CB4UL)
#define CYREG_PERI_MS_PPU_FX82_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011CB8UL)
#define CYREG_PERI_MS_PPU_FX82_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX83)
  */
#define CYREG_PERI_MS_PPU_FX83_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011CC0UL)
#define CYREG_PERI_MS_PPU_FX83_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011CC4UL)
#define CYREG_PERI_MS_PPU_FX83_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011CD0UL)
#define CYREG_PERI_MS_PPU_FX83_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011CD4UL)
#define CYREG_PERI_MS_PPU_FX83_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011CD8UL)
#define CYREG_PERI_MS_PPU_FX83_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011CDCUL)
#define CYREG_PERI_MS_PPU_FX83_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011CE0UL)
#define CYREG_PERI_MS_PPU_FX83_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011CE4UL)
#define CYREG_PERI_MS_PPU_FX83_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011CF0UL)
#define CYREG_PERI_MS_PPU_FX83_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011CF4UL)
#define CYREG_PERI_MS_PPU_FX83_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011CF8UL)
#define CYREG_PERI_MS_PPU_FX83_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX84)
  */
#define CYREG_PERI_MS_PPU_FX84_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011D00UL)
#define CYREG_PERI_MS_PPU_FX84_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011D04UL)
#define CYREG_PERI_MS_PPU_FX84_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011D10UL)
#define CYREG_PERI_MS_PPU_FX84_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011D14UL)
#define CYREG_PERI_MS_PPU_FX84_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011D18UL)
#define CYREG_PERI_MS_PPU_FX84_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011D1CUL)
#define CYREG_PERI_MS_PPU_FX84_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011D20UL)
#define CYREG_PERI_MS_PPU_FX84_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011D24UL)
#define CYREG_PERI_MS_PPU_FX84_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011D30UL)
#define CYREG_PERI_MS_PPU_FX84_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011D34UL)
#define CYREG_PERI_MS_PPU_FX84_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011D38UL)
#define CYREG_PERI_MS_PPU_FX84_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX85)
  */
#define CYREG_PERI_MS_PPU_FX85_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011D40UL)
#define CYREG_PERI_MS_PPU_FX85_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011D44UL)
#define CYREG_PERI_MS_PPU_FX85_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011D50UL)
#define CYREG_PERI_MS_PPU_FX85_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011D54UL)
#define CYREG_PERI_MS_PPU_FX85_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011D58UL)
#define CYREG_PERI_MS_PPU_FX85_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011D5CUL)
#define CYREG_PERI_MS_PPU_FX85_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011D60UL)
#define CYREG_PERI_MS_PPU_FX85_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011D64UL)
#define CYREG_PERI_MS_PPU_FX85_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011D70UL)
#define CYREG_PERI_MS_PPU_FX85_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011D74UL)
#define CYREG_PERI_MS_PPU_FX85_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011D78UL)
#define CYREG_PERI_MS_PPU_FX85_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX86)
  */
#define CYREG_PERI_MS_PPU_FX86_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011D80UL)
#define CYREG_PERI_MS_PPU_FX86_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011D84UL)
#define CYREG_PERI_MS_PPU_FX86_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011D90UL)
#define CYREG_PERI_MS_PPU_FX86_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011D94UL)
#define CYREG_PERI_MS_PPU_FX86_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011D98UL)
#define CYREG_PERI_MS_PPU_FX86_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011D9CUL)
#define CYREG_PERI_MS_PPU_FX86_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011DA0UL)
#define CYREG_PERI_MS_PPU_FX86_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011DA4UL)
#define CYREG_PERI_MS_PPU_FX86_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011DB0UL)
#define CYREG_PERI_MS_PPU_FX86_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011DB4UL)
#define CYREG_PERI_MS_PPU_FX86_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011DB8UL)
#define CYREG_PERI_MS_PPU_FX86_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX87)
  */
#define CYREG_PERI_MS_PPU_FX87_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011DC0UL)
#define CYREG_PERI_MS_PPU_FX87_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011DC4UL)
#define CYREG_PERI_MS_PPU_FX87_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011DD0UL)
#define CYREG_PERI_MS_PPU_FX87_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011DD4UL)
#define CYREG_PERI_MS_PPU_FX87_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011DD8UL)
#define CYREG_PERI_MS_PPU_FX87_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011DDCUL)
#define CYREG_PERI_MS_PPU_FX87_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011DE0UL)
#define CYREG_PERI_MS_PPU_FX87_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011DE4UL)
#define CYREG_PERI_MS_PPU_FX87_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011DF0UL)
#define CYREG_PERI_MS_PPU_FX87_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011DF4UL)
#define CYREG_PERI_MS_PPU_FX87_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011DF8UL)
#define CYREG_PERI_MS_PPU_FX87_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX88)
  */
#define CYREG_PERI_MS_PPU_FX88_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011E00UL)
#define CYREG_PERI_MS_PPU_FX88_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011E04UL)
#define CYREG_PERI_MS_PPU_FX88_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011E10UL)
#define CYREG_PERI_MS_PPU_FX88_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011E14UL)
#define CYREG_PERI_MS_PPU_FX88_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011E18UL)
#define CYREG_PERI_MS_PPU_FX88_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011E1CUL)
#define CYREG_PERI_MS_PPU_FX88_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011E20UL)
#define CYREG_PERI_MS_PPU_FX88_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011E24UL)
#define CYREG_PERI_MS_PPU_FX88_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011E30UL)
#define CYREG_PERI_MS_PPU_FX88_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011E34UL)
#define CYREG_PERI_MS_PPU_FX88_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011E38UL)
#define CYREG_PERI_MS_PPU_FX88_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX89)
  */
#define CYREG_PERI_MS_PPU_FX89_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011E40UL)
#define CYREG_PERI_MS_PPU_FX89_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011E44UL)
#define CYREG_PERI_MS_PPU_FX89_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011E50UL)
#define CYREG_PERI_MS_PPU_FX89_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011E54UL)
#define CYREG_PERI_MS_PPU_FX89_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011E58UL)
#define CYREG_PERI_MS_PPU_FX89_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011E5CUL)
#define CYREG_PERI_MS_PPU_FX89_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011E60UL)
#define CYREG_PERI_MS_PPU_FX89_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011E64UL)
#define CYREG_PERI_MS_PPU_FX89_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011E70UL)
#define CYREG_PERI_MS_PPU_FX89_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011E74UL)
#define CYREG_PERI_MS_PPU_FX89_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011E78UL)
#define CYREG_PERI_MS_PPU_FX89_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX90)
  */
#define CYREG_PERI_MS_PPU_FX90_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011E80UL)
#define CYREG_PERI_MS_PPU_FX90_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011E84UL)
#define CYREG_PERI_MS_PPU_FX90_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011E90UL)
#define CYREG_PERI_MS_PPU_FX90_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011E94UL)
#define CYREG_PERI_MS_PPU_FX90_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011E98UL)
#define CYREG_PERI_MS_PPU_FX90_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011E9CUL)
#define CYREG_PERI_MS_PPU_FX90_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011EA0UL)
#define CYREG_PERI_MS_PPU_FX90_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011EA4UL)
#define CYREG_PERI_MS_PPU_FX90_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011EB0UL)
#define CYREG_PERI_MS_PPU_FX90_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011EB4UL)
#define CYREG_PERI_MS_PPU_FX90_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011EB8UL)
#define CYREG_PERI_MS_PPU_FX90_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX91)
  */
#define CYREG_PERI_MS_PPU_FX91_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011EC0UL)
#define CYREG_PERI_MS_PPU_FX91_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011EC4UL)
#define CYREG_PERI_MS_PPU_FX91_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011ED0UL)
#define CYREG_PERI_MS_PPU_FX91_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011ED4UL)
#define CYREG_PERI_MS_PPU_FX91_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011ED8UL)
#define CYREG_PERI_MS_PPU_FX91_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011EDCUL)
#define CYREG_PERI_MS_PPU_FX91_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011EE0UL)
#define CYREG_PERI_MS_PPU_FX91_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011EE4UL)
#define CYREG_PERI_MS_PPU_FX91_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011EF0UL)
#define CYREG_PERI_MS_PPU_FX91_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011EF4UL)
#define CYREG_PERI_MS_PPU_FX91_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011EF8UL)
#define CYREG_PERI_MS_PPU_FX91_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX92)
  */
#define CYREG_PERI_MS_PPU_FX92_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011F00UL)
#define CYREG_PERI_MS_PPU_FX92_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011F04UL)
#define CYREG_PERI_MS_PPU_FX92_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011F10UL)
#define CYREG_PERI_MS_PPU_FX92_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011F14UL)
#define CYREG_PERI_MS_PPU_FX92_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011F18UL)
#define CYREG_PERI_MS_PPU_FX92_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011F1CUL)
#define CYREG_PERI_MS_PPU_FX92_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011F20UL)
#define CYREG_PERI_MS_PPU_FX92_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011F24UL)
#define CYREG_PERI_MS_PPU_FX92_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011F30UL)
#define CYREG_PERI_MS_PPU_FX92_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011F34UL)
#define CYREG_PERI_MS_PPU_FX92_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011F38UL)
#define CYREG_PERI_MS_PPU_FX92_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX93)
  */
#define CYREG_PERI_MS_PPU_FX93_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011F40UL)
#define CYREG_PERI_MS_PPU_FX93_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011F44UL)
#define CYREG_PERI_MS_PPU_FX93_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011F50UL)
#define CYREG_PERI_MS_PPU_FX93_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011F54UL)
#define CYREG_PERI_MS_PPU_FX93_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011F58UL)
#define CYREG_PERI_MS_PPU_FX93_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011F5CUL)
#define CYREG_PERI_MS_PPU_FX93_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011F60UL)
#define CYREG_PERI_MS_PPU_FX93_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011F64UL)
#define CYREG_PERI_MS_PPU_FX93_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011F70UL)
#define CYREG_PERI_MS_PPU_FX93_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011F74UL)
#define CYREG_PERI_MS_PPU_FX93_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011F78UL)
#define CYREG_PERI_MS_PPU_FX93_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX94)
  */
#define CYREG_PERI_MS_PPU_FX94_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011F80UL)
#define CYREG_PERI_MS_PPU_FX94_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011F84UL)
#define CYREG_PERI_MS_PPU_FX94_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011F90UL)
#define CYREG_PERI_MS_PPU_FX94_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011F94UL)
#define CYREG_PERI_MS_PPU_FX94_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011F98UL)
#define CYREG_PERI_MS_PPU_FX94_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011F9CUL)
#define CYREG_PERI_MS_PPU_FX94_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011FA0UL)
#define CYREG_PERI_MS_PPU_FX94_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011FA4UL)
#define CYREG_PERI_MS_PPU_FX94_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011FB0UL)
#define CYREG_PERI_MS_PPU_FX94_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011FB4UL)
#define CYREG_PERI_MS_PPU_FX94_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011FB8UL)
#define CYREG_PERI_MS_PPU_FX94_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX95)
  */
#define CYREG_PERI_MS_PPU_FX95_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40011FC0UL)
#define CYREG_PERI_MS_PPU_FX95_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40011FC4UL)
#define CYREG_PERI_MS_PPU_FX95_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40011FD0UL)
#define CYREG_PERI_MS_PPU_FX95_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40011FD4UL)
#define CYREG_PERI_MS_PPU_FX95_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40011FD8UL)
#define CYREG_PERI_MS_PPU_FX95_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40011FDCUL)
#define CYREG_PERI_MS_PPU_FX95_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40011FE0UL)
#define CYREG_PERI_MS_PPU_FX95_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40011FE4UL)
#define CYREG_PERI_MS_PPU_FX95_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40011FF0UL)
#define CYREG_PERI_MS_PPU_FX95_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40011FF4UL)
#define CYREG_PERI_MS_PPU_FX95_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40011FF8UL)
#define CYREG_PERI_MS_PPU_FX95_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40011FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX96)
  */
#define CYREG_PERI_MS_PPU_FX96_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012000UL)
#define CYREG_PERI_MS_PPU_FX96_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012004UL)
#define CYREG_PERI_MS_PPU_FX96_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012010UL)
#define CYREG_PERI_MS_PPU_FX96_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012014UL)
#define CYREG_PERI_MS_PPU_FX96_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012018UL)
#define CYREG_PERI_MS_PPU_FX96_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001201CUL)
#define CYREG_PERI_MS_PPU_FX96_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012020UL)
#define CYREG_PERI_MS_PPU_FX96_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012024UL)
#define CYREG_PERI_MS_PPU_FX96_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012030UL)
#define CYREG_PERI_MS_PPU_FX96_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012034UL)
#define CYREG_PERI_MS_PPU_FX96_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012038UL)
#define CYREG_PERI_MS_PPU_FX96_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001203CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX97)
  */
#define CYREG_PERI_MS_PPU_FX97_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012040UL)
#define CYREG_PERI_MS_PPU_FX97_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012044UL)
#define CYREG_PERI_MS_PPU_FX97_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012050UL)
#define CYREG_PERI_MS_PPU_FX97_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012054UL)
#define CYREG_PERI_MS_PPU_FX97_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012058UL)
#define CYREG_PERI_MS_PPU_FX97_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001205CUL)
#define CYREG_PERI_MS_PPU_FX97_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012060UL)
#define CYREG_PERI_MS_PPU_FX97_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012064UL)
#define CYREG_PERI_MS_PPU_FX97_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012070UL)
#define CYREG_PERI_MS_PPU_FX97_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012074UL)
#define CYREG_PERI_MS_PPU_FX97_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012078UL)
#define CYREG_PERI_MS_PPU_FX97_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001207CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX98)
  */
#define CYREG_PERI_MS_PPU_FX98_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012080UL)
#define CYREG_PERI_MS_PPU_FX98_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012084UL)
#define CYREG_PERI_MS_PPU_FX98_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012090UL)
#define CYREG_PERI_MS_PPU_FX98_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012094UL)
#define CYREG_PERI_MS_PPU_FX98_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012098UL)
#define CYREG_PERI_MS_PPU_FX98_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001209CUL)
#define CYREG_PERI_MS_PPU_FX98_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400120A0UL)
#define CYREG_PERI_MS_PPU_FX98_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400120A4UL)
#define CYREG_PERI_MS_PPU_FX98_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400120B0UL)
#define CYREG_PERI_MS_PPU_FX98_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400120B4UL)
#define CYREG_PERI_MS_PPU_FX98_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400120B8UL)
#define CYREG_PERI_MS_PPU_FX98_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400120BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX99)
  */
#define CYREG_PERI_MS_PPU_FX99_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400120C0UL)
#define CYREG_PERI_MS_PPU_FX99_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400120C4UL)
#define CYREG_PERI_MS_PPU_FX99_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400120D0UL)
#define CYREG_PERI_MS_PPU_FX99_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400120D4UL)
#define CYREG_PERI_MS_PPU_FX99_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400120D8UL)
#define CYREG_PERI_MS_PPU_FX99_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400120DCUL)
#define CYREG_PERI_MS_PPU_FX99_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400120E0UL)
#define CYREG_PERI_MS_PPU_FX99_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400120E4UL)
#define CYREG_PERI_MS_PPU_FX99_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400120F0UL)
#define CYREG_PERI_MS_PPU_FX99_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400120F4UL)
#define CYREG_PERI_MS_PPU_FX99_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400120F8UL)
#define CYREG_PERI_MS_PPU_FX99_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400120FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX100)
  */
#define CYREG_PERI_MS_PPU_FX100_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012100UL)
#define CYREG_PERI_MS_PPU_FX100_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012104UL)
#define CYREG_PERI_MS_PPU_FX100_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012110UL)
#define CYREG_PERI_MS_PPU_FX100_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012114UL)
#define CYREG_PERI_MS_PPU_FX100_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012118UL)
#define CYREG_PERI_MS_PPU_FX100_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001211CUL)
#define CYREG_PERI_MS_PPU_FX100_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012120UL)
#define CYREG_PERI_MS_PPU_FX100_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012124UL)
#define CYREG_PERI_MS_PPU_FX100_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012130UL)
#define CYREG_PERI_MS_PPU_FX100_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012134UL)
#define CYREG_PERI_MS_PPU_FX100_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012138UL)
#define CYREG_PERI_MS_PPU_FX100_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001213CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX101)
  */
#define CYREG_PERI_MS_PPU_FX101_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012140UL)
#define CYREG_PERI_MS_PPU_FX101_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012144UL)
#define CYREG_PERI_MS_PPU_FX101_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012150UL)
#define CYREG_PERI_MS_PPU_FX101_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012154UL)
#define CYREG_PERI_MS_PPU_FX101_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012158UL)
#define CYREG_PERI_MS_PPU_FX101_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001215CUL)
#define CYREG_PERI_MS_PPU_FX101_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012160UL)
#define CYREG_PERI_MS_PPU_FX101_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012164UL)
#define CYREG_PERI_MS_PPU_FX101_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012170UL)
#define CYREG_PERI_MS_PPU_FX101_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012174UL)
#define CYREG_PERI_MS_PPU_FX101_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012178UL)
#define CYREG_PERI_MS_PPU_FX101_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001217CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX102)
  */
#define CYREG_PERI_MS_PPU_FX102_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012180UL)
#define CYREG_PERI_MS_PPU_FX102_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012184UL)
#define CYREG_PERI_MS_PPU_FX102_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012190UL)
#define CYREG_PERI_MS_PPU_FX102_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012194UL)
#define CYREG_PERI_MS_PPU_FX102_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012198UL)
#define CYREG_PERI_MS_PPU_FX102_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001219CUL)
#define CYREG_PERI_MS_PPU_FX102_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400121A0UL)
#define CYREG_PERI_MS_PPU_FX102_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400121A4UL)
#define CYREG_PERI_MS_PPU_FX102_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400121B0UL)
#define CYREG_PERI_MS_PPU_FX102_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400121B4UL)
#define CYREG_PERI_MS_PPU_FX102_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400121B8UL)
#define CYREG_PERI_MS_PPU_FX102_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400121BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX103)
  */
#define CYREG_PERI_MS_PPU_FX103_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400121C0UL)
#define CYREG_PERI_MS_PPU_FX103_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400121C4UL)
#define CYREG_PERI_MS_PPU_FX103_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400121D0UL)
#define CYREG_PERI_MS_PPU_FX103_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400121D4UL)
#define CYREG_PERI_MS_PPU_FX103_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400121D8UL)
#define CYREG_PERI_MS_PPU_FX103_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400121DCUL)
#define CYREG_PERI_MS_PPU_FX103_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400121E0UL)
#define CYREG_PERI_MS_PPU_FX103_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400121E4UL)
#define CYREG_PERI_MS_PPU_FX103_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400121F0UL)
#define CYREG_PERI_MS_PPU_FX103_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400121F4UL)
#define CYREG_PERI_MS_PPU_FX103_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400121F8UL)
#define CYREG_PERI_MS_PPU_FX103_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400121FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX104)
  */
#define CYREG_PERI_MS_PPU_FX104_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012200UL)
#define CYREG_PERI_MS_PPU_FX104_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012204UL)
#define CYREG_PERI_MS_PPU_FX104_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012210UL)
#define CYREG_PERI_MS_PPU_FX104_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012214UL)
#define CYREG_PERI_MS_PPU_FX104_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012218UL)
#define CYREG_PERI_MS_PPU_FX104_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001221CUL)
#define CYREG_PERI_MS_PPU_FX104_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012220UL)
#define CYREG_PERI_MS_PPU_FX104_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012224UL)
#define CYREG_PERI_MS_PPU_FX104_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012230UL)
#define CYREG_PERI_MS_PPU_FX104_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012234UL)
#define CYREG_PERI_MS_PPU_FX104_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012238UL)
#define CYREG_PERI_MS_PPU_FX104_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001223CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX105)
  */
#define CYREG_PERI_MS_PPU_FX105_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012240UL)
#define CYREG_PERI_MS_PPU_FX105_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012244UL)
#define CYREG_PERI_MS_PPU_FX105_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012250UL)
#define CYREG_PERI_MS_PPU_FX105_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012254UL)
#define CYREG_PERI_MS_PPU_FX105_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012258UL)
#define CYREG_PERI_MS_PPU_FX105_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001225CUL)
#define CYREG_PERI_MS_PPU_FX105_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012260UL)
#define CYREG_PERI_MS_PPU_FX105_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012264UL)
#define CYREG_PERI_MS_PPU_FX105_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012270UL)
#define CYREG_PERI_MS_PPU_FX105_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012274UL)
#define CYREG_PERI_MS_PPU_FX105_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012278UL)
#define CYREG_PERI_MS_PPU_FX105_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001227CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX106)
  */
#define CYREG_PERI_MS_PPU_FX106_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012280UL)
#define CYREG_PERI_MS_PPU_FX106_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012284UL)
#define CYREG_PERI_MS_PPU_FX106_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012290UL)
#define CYREG_PERI_MS_PPU_FX106_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012294UL)
#define CYREG_PERI_MS_PPU_FX106_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012298UL)
#define CYREG_PERI_MS_PPU_FX106_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001229CUL)
#define CYREG_PERI_MS_PPU_FX106_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400122A0UL)
#define CYREG_PERI_MS_PPU_FX106_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400122A4UL)
#define CYREG_PERI_MS_PPU_FX106_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400122B0UL)
#define CYREG_PERI_MS_PPU_FX106_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400122B4UL)
#define CYREG_PERI_MS_PPU_FX106_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400122B8UL)
#define CYREG_PERI_MS_PPU_FX106_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400122BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX107)
  */
#define CYREG_PERI_MS_PPU_FX107_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400122C0UL)
#define CYREG_PERI_MS_PPU_FX107_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400122C4UL)
#define CYREG_PERI_MS_PPU_FX107_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400122D0UL)
#define CYREG_PERI_MS_PPU_FX107_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400122D4UL)
#define CYREG_PERI_MS_PPU_FX107_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400122D8UL)
#define CYREG_PERI_MS_PPU_FX107_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400122DCUL)
#define CYREG_PERI_MS_PPU_FX107_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400122E0UL)
#define CYREG_PERI_MS_PPU_FX107_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400122E4UL)
#define CYREG_PERI_MS_PPU_FX107_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400122F0UL)
#define CYREG_PERI_MS_PPU_FX107_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400122F4UL)
#define CYREG_PERI_MS_PPU_FX107_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400122F8UL)
#define CYREG_PERI_MS_PPU_FX107_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400122FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX108)
  */
#define CYREG_PERI_MS_PPU_FX108_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012300UL)
#define CYREG_PERI_MS_PPU_FX108_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012304UL)
#define CYREG_PERI_MS_PPU_FX108_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012310UL)
#define CYREG_PERI_MS_PPU_FX108_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012314UL)
#define CYREG_PERI_MS_PPU_FX108_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012318UL)
#define CYREG_PERI_MS_PPU_FX108_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001231CUL)
#define CYREG_PERI_MS_PPU_FX108_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012320UL)
#define CYREG_PERI_MS_PPU_FX108_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012324UL)
#define CYREG_PERI_MS_PPU_FX108_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012330UL)
#define CYREG_PERI_MS_PPU_FX108_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012334UL)
#define CYREG_PERI_MS_PPU_FX108_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012338UL)
#define CYREG_PERI_MS_PPU_FX108_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001233CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX109)
  */
#define CYREG_PERI_MS_PPU_FX109_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012340UL)
#define CYREG_PERI_MS_PPU_FX109_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012344UL)
#define CYREG_PERI_MS_PPU_FX109_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012350UL)
#define CYREG_PERI_MS_PPU_FX109_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012354UL)
#define CYREG_PERI_MS_PPU_FX109_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012358UL)
#define CYREG_PERI_MS_PPU_FX109_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001235CUL)
#define CYREG_PERI_MS_PPU_FX109_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012360UL)
#define CYREG_PERI_MS_PPU_FX109_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012364UL)
#define CYREG_PERI_MS_PPU_FX109_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012370UL)
#define CYREG_PERI_MS_PPU_FX109_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012374UL)
#define CYREG_PERI_MS_PPU_FX109_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012378UL)
#define CYREG_PERI_MS_PPU_FX109_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001237CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX110)
  */
#define CYREG_PERI_MS_PPU_FX110_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012380UL)
#define CYREG_PERI_MS_PPU_FX110_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012384UL)
#define CYREG_PERI_MS_PPU_FX110_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012390UL)
#define CYREG_PERI_MS_PPU_FX110_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012394UL)
#define CYREG_PERI_MS_PPU_FX110_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012398UL)
#define CYREG_PERI_MS_PPU_FX110_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001239CUL)
#define CYREG_PERI_MS_PPU_FX110_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400123A0UL)
#define CYREG_PERI_MS_PPU_FX110_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400123A4UL)
#define CYREG_PERI_MS_PPU_FX110_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400123B0UL)
#define CYREG_PERI_MS_PPU_FX110_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400123B4UL)
#define CYREG_PERI_MS_PPU_FX110_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400123B8UL)
#define CYREG_PERI_MS_PPU_FX110_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400123BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX111)
  */
#define CYREG_PERI_MS_PPU_FX111_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400123C0UL)
#define CYREG_PERI_MS_PPU_FX111_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400123C4UL)
#define CYREG_PERI_MS_PPU_FX111_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400123D0UL)
#define CYREG_PERI_MS_PPU_FX111_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400123D4UL)
#define CYREG_PERI_MS_PPU_FX111_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400123D8UL)
#define CYREG_PERI_MS_PPU_FX111_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400123DCUL)
#define CYREG_PERI_MS_PPU_FX111_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400123E0UL)
#define CYREG_PERI_MS_PPU_FX111_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400123E4UL)
#define CYREG_PERI_MS_PPU_FX111_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400123F0UL)
#define CYREG_PERI_MS_PPU_FX111_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400123F4UL)
#define CYREG_PERI_MS_PPU_FX111_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400123F8UL)
#define CYREG_PERI_MS_PPU_FX111_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400123FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX112)
  */
#define CYREG_PERI_MS_PPU_FX112_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012400UL)
#define CYREG_PERI_MS_PPU_FX112_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012404UL)
#define CYREG_PERI_MS_PPU_FX112_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012410UL)
#define CYREG_PERI_MS_PPU_FX112_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012414UL)
#define CYREG_PERI_MS_PPU_FX112_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012418UL)
#define CYREG_PERI_MS_PPU_FX112_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001241CUL)
#define CYREG_PERI_MS_PPU_FX112_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012420UL)
#define CYREG_PERI_MS_PPU_FX112_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012424UL)
#define CYREG_PERI_MS_PPU_FX112_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012430UL)
#define CYREG_PERI_MS_PPU_FX112_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012434UL)
#define CYREG_PERI_MS_PPU_FX112_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012438UL)
#define CYREG_PERI_MS_PPU_FX112_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001243CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX113)
  */
#define CYREG_PERI_MS_PPU_FX113_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012440UL)
#define CYREG_PERI_MS_PPU_FX113_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012444UL)
#define CYREG_PERI_MS_PPU_FX113_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012450UL)
#define CYREG_PERI_MS_PPU_FX113_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012454UL)
#define CYREG_PERI_MS_PPU_FX113_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012458UL)
#define CYREG_PERI_MS_PPU_FX113_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001245CUL)
#define CYREG_PERI_MS_PPU_FX113_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012460UL)
#define CYREG_PERI_MS_PPU_FX113_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012464UL)
#define CYREG_PERI_MS_PPU_FX113_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012470UL)
#define CYREG_PERI_MS_PPU_FX113_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012474UL)
#define CYREG_PERI_MS_PPU_FX113_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012478UL)
#define CYREG_PERI_MS_PPU_FX113_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001247CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX114)
  */
#define CYREG_PERI_MS_PPU_FX114_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012480UL)
#define CYREG_PERI_MS_PPU_FX114_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012484UL)
#define CYREG_PERI_MS_PPU_FX114_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012490UL)
#define CYREG_PERI_MS_PPU_FX114_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012494UL)
#define CYREG_PERI_MS_PPU_FX114_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012498UL)
#define CYREG_PERI_MS_PPU_FX114_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001249CUL)
#define CYREG_PERI_MS_PPU_FX114_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400124A0UL)
#define CYREG_PERI_MS_PPU_FX114_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400124A4UL)
#define CYREG_PERI_MS_PPU_FX114_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400124B0UL)
#define CYREG_PERI_MS_PPU_FX114_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400124B4UL)
#define CYREG_PERI_MS_PPU_FX114_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400124B8UL)
#define CYREG_PERI_MS_PPU_FX114_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400124BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX115)
  */
#define CYREG_PERI_MS_PPU_FX115_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400124C0UL)
#define CYREG_PERI_MS_PPU_FX115_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400124C4UL)
#define CYREG_PERI_MS_PPU_FX115_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400124D0UL)
#define CYREG_PERI_MS_PPU_FX115_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400124D4UL)
#define CYREG_PERI_MS_PPU_FX115_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400124D8UL)
#define CYREG_PERI_MS_PPU_FX115_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400124DCUL)
#define CYREG_PERI_MS_PPU_FX115_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400124E0UL)
#define CYREG_PERI_MS_PPU_FX115_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400124E4UL)
#define CYREG_PERI_MS_PPU_FX115_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400124F0UL)
#define CYREG_PERI_MS_PPU_FX115_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400124F4UL)
#define CYREG_PERI_MS_PPU_FX115_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400124F8UL)
#define CYREG_PERI_MS_PPU_FX115_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400124FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX116)
  */
#define CYREG_PERI_MS_PPU_FX116_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012500UL)
#define CYREG_PERI_MS_PPU_FX116_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012504UL)
#define CYREG_PERI_MS_PPU_FX116_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012510UL)
#define CYREG_PERI_MS_PPU_FX116_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012514UL)
#define CYREG_PERI_MS_PPU_FX116_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012518UL)
#define CYREG_PERI_MS_PPU_FX116_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001251CUL)
#define CYREG_PERI_MS_PPU_FX116_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012520UL)
#define CYREG_PERI_MS_PPU_FX116_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012524UL)
#define CYREG_PERI_MS_PPU_FX116_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012530UL)
#define CYREG_PERI_MS_PPU_FX116_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012534UL)
#define CYREG_PERI_MS_PPU_FX116_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012538UL)
#define CYREG_PERI_MS_PPU_FX116_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001253CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX117)
  */
#define CYREG_PERI_MS_PPU_FX117_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012540UL)
#define CYREG_PERI_MS_PPU_FX117_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012544UL)
#define CYREG_PERI_MS_PPU_FX117_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012550UL)
#define CYREG_PERI_MS_PPU_FX117_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012554UL)
#define CYREG_PERI_MS_PPU_FX117_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012558UL)
#define CYREG_PERI_MS_PPU_FX117_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001255CUL)
#define CYREG_PERI_MS_PPU_FX117_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012560UL)
#define CYREG_PERI_MS_PPU_FX117_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012564UL)
#define CYREG_PERI_MS_PPU_FX117_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012570UL)
#define CYREG_PERI_MS_PPU_FX117_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012574UL)
#define CYREG_PERI_MS_PPU_FX117_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012578UL)
#define CYREG_PERI_MS_PPU_FX117_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001257CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX118)
  */
#define CYREG_PERI_MS_PPU_FX118_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012580UL)
#define CYREG_PERI_MS_PPU_FX118_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012584UL)
#define CYREG_PERI_MS_PPU_FX118_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012590UL)
#define CYREG_PERI_MS_PPU_FX118_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012594UL)
#define CYREG_PERI_MS_PPU_FX118_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012598UL)
#define CYREG_PERI_MS_PPU_FX118_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001259CUL)
#define CYREG_PERI_MS_PPU_FX118_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400125A0UL)
#define CYREG_PERI_MS_PPU_FX118_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400125A4UL)
#define CYREG_PERI_MS_PPU_FX118_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400125B0UL)
#define CYREG_PERI_MS_PPU_FX118_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400125B4UL)
#define CYREG_PERI_MS_PPU_FX118_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400125B8UL)
#define CYREG_PERI_MS_PPU_FX118_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400125BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX119)
  */
#define CYREG_PERI_MS_PPU_FX119_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400125C0UL)
#define CYREG_PERI_MS_PPU_FX119_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400125C4UL)
#define CYREG_PERI_MS_PPU_FX119_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400125D0UL)
#define CYREG_PERI_MS_PPU_FX119_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400125D4UL)
#define CYREG_PERI_MS_PPU_FX119_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400125D8UL)
#define CYREG_PERI_MS_PPU_FX119_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400125DCUL)
#define CYREG_PERI_MS_PPU_FX119_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400125E0UL)
#define CYREG_PERI_MS_PPU_FX119_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400125E4UL)
#define CYREG_PERI_MS_PPU_FX119_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400125F0UL)
#define CYREG_PERI_MS_PPU_FX119_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400125F4UL)
#define CYREG_PERI_MS_PPU_FX119_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400125F8UL)
#define CYREG_PERI_MS_PPU_FX119_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400125FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX120)
  */
#define CYREG_PERI_MS_PPU_FX120_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012600UL)
#define CYREG_PERI_MS_PPU_FX120_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012604UL)
#define CYREG_PERI_MS_PPU_FX120_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012610UL)
#define CYREG_PERI_MS_PPU_FX120_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012614UL)
#define CYREG_PERI_MS_PPU_FX120_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012618UL)
#define CYREG_PERI_MS_PPU_FX120_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001261CUL)
#define CYREG_PERI_MS_PPU_FX120_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012620UL)
#define CYREG_PERI_MS_PPU_FX120_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012624UL)
#define CYREG_PERI_MS_PPU_FX120_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012630UL)
#define CYREG_PERI_MS_PPU_FX120_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012634UL)
#define CYREG_PERI_MS_PPU_FX120_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012638UL)
#define CYREG_PERI_MS_PPU_FX120_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001263CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX121)
  */
#define CYREG_PERI_MS_PPU_FX121_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012640UL)
#define CYREG_PERI_MS_PPU_FX121_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012644UL)
#define CYREG_PERI_MS_PPU_FX121_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012650UL)
#define CYREG_PERI_MS_PPU_FX121_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012654UL)
#define CYREG_PERI_MS_PPU_FX121_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012658UL)
#define CYREG_PERI_MS_PPU_FX121_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001265CUL)
#define CYREG_PERI_MS_PPU_FX121_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012660UL)
#define CYREG_PERI_MS_PPU_FX121_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012664UL)
#define CYREG_PERI_MS_PPU_FX121_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012670UL)
#define CYREG_PERI_MS_PPU_FX121_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012674UL)
#define CYREG_PERI_MS_PPU_FX121_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012678UL)
#define CYREG_PERI_MS_PPU_FX121_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001267CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX122)
  */
#define CYREG_PERI_MS_PPU_FX122_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012680UL)
#define CYREG_PERI_MS_PPU_FX122_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012684UL)
#define CYREG_PERI_MS_PPU_FX122_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012690UL)
#define CYREG_PERI_MS_PPU_FX122_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012694UL)
#define CYREG_PERI_MS_PPU_FX122_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012698UL)
#define CYREG_PERI_MS_PPU_FX122_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001269CUL)
#define CYREG_PERI_MS_PPU_FX122_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400126A0UL)
#define CYREG_PERI_MS_PPU_FX122_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400126A4UL)
#define CYREG_PERI_MS_PPU_FX122_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400126B0UL)
#define CYREG_PERI_MS_PPU_FX122_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400126B4UL)
#define CYREG_PERI_MS_PPU_FX122_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400126B8UL)
#define CYREG_PERI_MS_PPU_FX122_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400126BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX123)
  */
#define CYREG_PERI_MS_PPU_FX123_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400126C0UL)
#define CYREG_PERI_MS_PPU_FX123_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400126C4UL)
#define CYREG_PERI_MS_PPU_FX123_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400126D0UL)
#define CYREG_PERI_MS_PPU_FX123_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400126D4UL)
#define CYREG_PERI_MS_PPU_FX123_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400126D8UL)
#define CYREG_PERI_MS_PPU_FX123_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400126DCUL)
#define CYREG_PERI_MS_PPU_FX123_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400126E0UL)
#define CYREG_PERI_MS_PPU_FX123_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400126E4UL)
#define CYREG_PERI_MS_PPU_FX123_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400126F0UL)
#define CYREG_PERI_MS_PPU_FX123_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400126F4UL)
#define CYREG_PERI_MS_PPU_FX123_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400126F8UL)
#define CYREG_PERI_MS_PPU_FX123_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400126FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX124)
  */
#define CYREG_PERI_MS_PPU_FX124_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012700UL)
#define CYREG_PERI_MS_PPU_FX124_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012704UL)
#define CYREG_PERI_MS_PPU_FX124_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012710UL)
#define CYREG_PERI_MS_PPU_FX124_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012714UL)
#define CYREG_PERI_MS_PPU_FX124_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012718UL)
#define CYREG_PERI_MS_PPU_FX124_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001271CUL)
#define CYREG_PERI_MS_PPU_FX124_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012720UL)
#define CYREG_PERI_MS_PPU_FX124_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012724UL)
#define CYREG_PERI_MS_PPU_FX124_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012730UL)
#define CYREG_PERI_MS_PPU_FX124_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012734UL)
#define CYREG_PERI_MS_PPU_FX124_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012738UL)
#define CYREG_PERI_MS_PPU_FX124_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001273CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX125)
  */
#define CYREG_PERI_MS_PPU_FX125_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012740UL)
#define CYREG_PERI_MS_PPU_FX125_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012744UL)
#define CYREG_PERI_MS_PPU_FX125_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012750UL)
#define CYREG_PERI_MS_PPU_FX125_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012754UL)
#define CYREG_PERI_MS_PPU_FX125_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012758UL)
#define CYREG_PERI_MS_PPU_FX125_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001275CUL)
#define CYREG_PERI_MS_PPU_FX125_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012760UL)
#define CYREG_PERI_MS_PPU_FX125_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012764UL)
#define CYREG_PERI_MS_PPU_FX125_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012770UL)
#define CYREG_PERI_MS_PPU_FX125_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012774UL)
#define CYREG_PERI_MS_PPU_FX125_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012778UL)
#define CYREG_PERI_MS_PPU_FX125_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001277CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX126)
  */
#define CYREG_PERI_MS_PPU_FX126_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012780UL)
#define CYREG_PERI_MS_PPU_FX126_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012784UL)
#define CYREG_PERI_MS_PPU_FX126_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012790UL)
#define CYREG_PERI_MS_PPU_FX126_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012794UL)
#define CYREG_PERI_MS_PPU_FX126_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012798UL)
#define CYREG_PERI_MS_PPU_FX126_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001279CUL)
#define CYREG_PERI_MS_PPU_FX126_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400127A0UL)
#define CYREG_PERI_MS_PPU_FX126_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400127A4UL)
#define CYREG_PERI_MS_PPU_FX126_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400127B0UL)
#define CYREG_PERI_MS_PPU_FX126_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400127B4UL)
#define CYREG_PERI_MS_PPU_FX126_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400127B8UL)
#define CYREG_PERI_MS_PPU_FX126_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400127BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX127)
  */
#define CYREG_PERI_MS_PPU_FX127_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400127C0UL)
#define CYREG_PERI_MS_PPU_FX127_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400127C4UL)
#define CYREG_PERI_MS_PPU_FX127_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400127D0UL)
#define CYREG_PERI_MS_PPU_FX127_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400127D4UL)
#define CYREG_PERI_MS_PPU_FX127_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400127D8UL)
#define CYREG_PERI_MS_PPU_FX127_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400127DCUL)
#define CYREG_PERI_MS_PPU_FX127_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400127E0UL)
#define CYREG_PERI_MS_PPU_FX127_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400127E4UL)
#define CYREG_PERI_MS_PPU_FX127_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400127F0UL)
#define CYREG_PERI_MS_PPU_FX127_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400127F4UL)
#define CYREG_PERI_MS_PPU_FX127_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400127F8UL)
#define CYREG_PERI_MS_PPU_FX127_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400127FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX128)
  */
#define CYREG_PERI_MS_PPU_FX128_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012800UL)
#define CYREG_PERI_MS_PPU_FX128_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012804UL)
#define CYREG_PERI_MS_PPU_FX128_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012810UL)
#define CYREG_PERI_MS_PPU_FX128_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012814UL)
#define CYREG_PERI_MS_PPU_FX128_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012818UL)
#define CYREG_PERI_MS_PPU_FX128_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001281CUL)
#define CYREG_PERI_MS_PPU_FX128_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012820UL)
#define CYREG_PERI_MS_PPU_FX128_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012824UL)
#define CYREG_PERI_MS_PPU_FX128_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012830UL)
#define CYREG_PERI_MS_PPU_FX128_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012834UL)
#define CYREG_PERI_MS_PPU_FX128_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012838UL)
#define CYREG_PERI_MS_PPU_FX128_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001283CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX129)
  */
#define CYREG_PERI_MS_PPU_FX129_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012840UL)
#define CYREG_PERI_MS_PPU_FX129_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012844UL)
#define CYREG_PERI_MS_PPU_FX129_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012850UL)
#define CYREG_PERI_MS_PPU_FX129_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012854UL)
#define CYREG_PERI_MS_PPU_FX129_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012858UL)
#define CYREG_PERI_MS_PPU_FX129_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001285CUL)
#define CYREG_PERI_MS_PPU_FX129_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012860UL)
#define CYREG_PERI_MS_PPU_FX129_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012864UL)
#define CYREG_PERI_MS_PPU_FX129_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012870UL)
#define CYREG_PERI_MS_PPU_FX129_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012874UL)
#define CYREG_PERI_MS_PPU_FX129_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012878UL)
#define CYREG_PERI_MS_PPU_FX129_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001287CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX130)
  */
#define CYREG_PERI_MS_PPU_FX130_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012880UL)
#define CYREG_PERI_MS_PPU_FX130_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012884UL)
#define CYREG_PERI_MS_PPU_FX130_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012890UL)
#define CYREG_PERI_MS_PPU_FX130_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012894UL)
#define CYREG_PERI_MS_PPU_FX130_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012898UL)
#define CYREG_PERI_MS_PPU_FX130_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001289CUL)
#define CYREG_PERI_MS_PPU_FX130_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400128A0UL)
#define CYREG_PERI_MS_PPU_FX130_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400128A4UL)
#define CYREG_PERI_MS_PPU_FX130_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400128B0UL)
#define CYREG_PERI_MS_PPU_FX130_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400128B4UL)
#define CYREG_PERI_MS_PPU_FX130_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400128B8UL)
#define CYREG_PERI_MS_PPU_FX130_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400128BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX131)
  */
#define CYREG_PERI_MS_PPU_FX131_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400128C0UL)
#define CYREG_PERI_MS_PPU_FX131_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400128C4UL)
#define CYREG_PERI_MS_PPU_FX131_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400128D0UL)
#define CYREG_PERI_MS_PPU_FX131_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400128D4UL)
#define CYREG_PERI_MS_PPU_FX131_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400128D8UL)
#define CYREG_PERI_MS_PPU_FX131_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400128DCUL)
#define CYREG_PERI_MS_PPU_FX131_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400128E0UL)
#define CYREG_PERI_MS_PPU_FX131_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400128E4UL)
#define CYREG_PERI_MS_PPU_FX131_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400128F0UL)
#define CYREG_PERI_MS_PPU_FX131_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400128F4UL)
#define CYREG_PERI_MS_PPU_FX131_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400128F8UL)
#define CYREG_PERI_MS_PPU_FX131_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400128FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX132)
  */
#define CYREG_PERI_MS_PPU_FX132_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012900UL)
#define CYREG_PERI_MS_PPU_FX132_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012904UL)
#define CYREG_PERI_MS_PPU_FX132_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012910UL)
#define CYREG_PERI_MS_PPU_FX132_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012914UL)
#define CYREG_PERI_MS_PPU_FX132_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012918UL)
#define CYREG_PERI_MS_PPU_FX132_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001291CUL)
#define CYREG_PERI_MS_PPU_FX132_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012920UL)
#define CYREG_PERI_MS_PPU_FX132_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012924UL)
#define CYREG_PERI_MS_PPU_FX132_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012930UL)
#define CYREG_PERI_MS_PPU_FX132_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012934UL)
#define CYREG_PERI_MS_PPU_FX132_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012938UL)
#define CYREG_PERI_MS_PPU_FX132_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001293CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX133)
  */
#define CYREG_PERI_MS_PPU_FX133_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012940UL)
#define CYREG_PERI_MS_PPU_FX133_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012944UL)
#define CYREG_PERI_MS_PPU_FX133_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012950UL)
#define CYREG_PERI_MS_PPU_FX133_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012954UL)
#define CYREG_PERI_MS_PPU_FX133_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012958UL)
#define CYREG_PERI_MS_PPU_FX133_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001295CUL)
#define CYREG_PERI_MS_PPU_FX133_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012960UL)
#define CYREG_PERI_MS_PPU_FX133_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012964UL)
#define CYREG_PERI_MS_PPU_FX133_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012970UL)
#define CYREG_PERI_MS_PPU_FX133_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012974UL)
#define CYREG_PERI_MS_PPU_FX133_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012978UL)
#define CYREG_PERI_MS_PPU_FX133_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001297CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX134)
  */
#define CYREG_PERI_MS_PPU_FX134_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012980UL)
#define CYREG_PERI_MS_PPU_FX134_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012984UL)
#define CYREG_PERI_MS_PPU_FX134_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012990UL)
#define CYREG_PERI_MS_PPU_FX134_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012994UL)
#define CYREG_PERI_MS_PPU_FX134_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012998UL)
#define CYREG_PERI_MS_PPU_FX134_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001299CUL)
#define CYREG_PERI_MS_PPU_FX134_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400129A0UL)
#define CYREG_PERI_MS_PPU_FX134_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400129A4UL)
#define CYREG_PERI_MS_PPU_FX134_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400129B0UL)
#define CYREG_PERI_MS_PPU_FX134_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400129B4UL)
#define CYREG_PERI_MS_PPU_FX134_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400129B8UL)
#define CYREG_PERI_MS_PPU_FX134_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400129BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX135)
  */
#define CYREG_PERI_MS_PPU_FX135_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400129C0UL)
#define CYREG_PERI_MS_PPU_FX135_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400129C4UL)
#define CYREG_PERI_MS_PPU_FX135_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400129D0UL)
#define CYREG_PERI_MS_PPU_FX135_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400129D4UL)
#define CYREG_PERI_MS_PPU_FX135_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400129D8UL)
#define CYREG_PERI_MS_PPU_FX135_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400129DCUL)
#define CYREG_PERI_MS_PPU_FX135_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400129E0UL)
#define CYREG_PERI_MS_PPU_FX135_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400129E4UL)
#define CYREG_PERI_MS_PPU_FX135_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400129F0UL)
#define CYREG_PERI_MS_PPU_FX135_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400129F4UL)
#define CYREG_PERI_MS_PPU_FX135_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400129F8UL)
#define CYREG_PERI_MS_PPU_FX135_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400129FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX136)
  */
#define CYREG_PERI_MS_PPU_FX136_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012A00UL)
#define CYREG_PERI_MS_PPU_FX136_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012A04UL)
#define CYREG_PERI_MS_PPU_FX136_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012A10UL)
#define CYREG_PERI_MS_PPU_FX136_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012A14UL)
#define CYREG_PERI_MS_PPU_FX136_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012A18UL)
#define CYREG_PERI_MS_PPU_FX136_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012A1CUL)
#define CYREG_PERI_MS_PPU_FX136_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012A20UL)
#define CYREG_PERI_MS_PPU_FX136_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012A24UL)
#define CYREG_PERI_MS_PPU_FX136_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012A30UL)
#define CYREG_PERI_MS_PPU_FX136_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012A34UL)
#define CYREG_PERI_MS_PPU_FX136_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012A38UL)
#define CYREG_PERI_MS_PPU_FX136_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX137)
  */
#define CYREG_PERI_MS_PPU_FX137_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012A40UL)
#define CYREG_PERI_MS_PPU_FX137_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012A44UL)
#define CYREG_PERI_MS_PPU_FX137_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012A50UL)
#define CYREG_PERI_MS_PPU_FX137_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012A54UL)
#define CYREG_PERI_MS_PPU_FX137_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012A58UL)
#define CYREG_PERI_MS_PPU_FX137_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012A5CUL)
#define CYREG_PERI_MS_PPU_FX137_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012A60UL)
#define CYREG_PERI_MS_PPU_FX137_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012A64UL)
#define CYREG_PERI_MS_PPU_FX137_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012A70UL)
#define CYREG_PERI_MS_PPU_FX137_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012A74UL)
#define CYREG_PERI_MS_PPU_FX137_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012A78UL)
#define CYREG_PERI_MS_PPU_FX137_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX138)
  */
#define CYREG_PERI_MS_PPU_FX138_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012A80UL)
#define CYREG_PERI_MS_PPU_FX138_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012A84UL)
#define CYREG_PERI_MS_PPU_FX138_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012A90UL)
#define CYREG_PERI_MS_PPU_FX138_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012A94UL)
#define CYREG_PERI_MS_PPU_FX138_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012A98UL)
#define CYREG_PERI_MS_PPU_FX138_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012A9CUL)
#define CYREG_PERI_MS_PPU_FX138_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012AA0UL)
#define CYREG_PERI_MS_PPU_FX138_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012AA4UL)
#define CYREG_PERI_MS_PPU_FX138_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012AB0UL)
#define CYREG_PERI_MS_PPU_FX138_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012AB4UL)
#define CYREG_PERI_MS_PPU_FX138_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012AB8UL)
#define CYREG_PERI_MS_PPU_FX138_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX139)
  */
#define CYREG_PERI_MS_PPU_FX139_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012AC0UL)
#define CYREG_PERI_MS_PPU_FX139_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012AC4UL)
#define CYREG_PERI_MS_PPU_FX139_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012AD0UL)
#define CYREG_PERI_MS_PPU_FX139_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012AD4UL)
#define CYREG_PERI_MS_PPU_FX139_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012AD8UL)
#define CYREG_PERI_MS_PPU_FX139_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012ADCUL)
#define CYREG_PERI_MS_PPU_FX139_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012AE0UL)
#define CYREG_PERI_MS_PPU_FX139_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012AE4UL)
#define CYREG_PERI_MS_PPU_FX139_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012AF0UL)
#define CYREG_PERI_MS_PPU_FX139_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012AF4UL)
#define CYREG_PERI_MS_PPU_FX139_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012AF8UL)
#define CYREG_PERI_MS_PPU_FX139_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX140)
  */
#define CYREG_PERI_MS_PPU_FX140_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012B00UL)
#define CYREG_PERI_MS_PPU_FX140_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012B04UL)
#define CYREG_PERI_MS_PPU_FX140_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012B10UL)
#define CYREG_PERI_MS_PPU_FX140_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012B14UL)
#define CYREG_PERI_MS_PPU_FX140_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012B18UL)
#define CYREG_PERI_MS_PPU_FX140_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012B1CUL)
#define CYREG_PERI_MS_PPU_FX140_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012B20UL)
#define CYREG_PERI_MS_PPU_FX140_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012B24UL)
#define CYREG_PERI_MS_PPU_FX140_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012B30UL)
#define CYREG_PERI_MS_PPU_FX140_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012B34UL)
#define CYREG_PERI_MS_PPU_FX140_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012B38UL)
#define CYREG_PERI_MS_PPU_FX140_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX141)
  */
#define CYREG_PERI_MS_PPU_FX141_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012B40UL)
#define CYREG_PERI_MS_PPU_FX141_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012B44UL)
#define CYREG_PERI_MS_PPU_FX141_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012B50UL)
#define CYREG_PERI_MS_PPU_FX141_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012B54UL)
#define CYREG_PERI_MS_PPU_FX141_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012B58UL)
#define CYREG_PERI_MS_PPU_FX141_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012B5CUL)
#define CYREG_PERI_MS_PPU_FX141_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012B60UL)
#define CYREG_PERI_MS_PPU_FX141_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012B64UL)
#define CYREG_PERI_MS_PPU_FX141_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012B70UL)
#define CYREG_PERI_MS_PPU_FX141_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012B74UL)
#define CYREG_PERI_MS_PPU_FX141_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012B78UL)
#define CYREG_PERI_MS_PPU_FX141_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX142)
  */
#define CYREG_PERI_MS_PPU_FX142_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012B80UL)
#define CYREG_PERI_MS_PPU_FX142_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012B84UL)
#define CYREG_PERI_MS_PPU_FX142_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012B90UL)
#define CYREG_PERI_MS_PPU_FX142_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012B94UL)
#define CYREG_PERI_MS_PPU_FX142_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012B98UL)
#define CYREG_PERI_MS_PPU_FX142_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012B9CUL)
#define CYREG_PERI_MS_PPU_FX142_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012BA0UL)
#define CYREG_PERI_MS_PPU_FX142_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012BA4UL)
#define CYREG_PERI_MS_PPU_FX142_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012BB0UL)
#define CYREG_PERI_MS_PPU_FX142_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012BB4UL)
#define CYREG_PERI_MS_PPU_FX142_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012BB8UL)
#define CYREG_PERI_MS_PPU_FX142_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX143)
  */
#define CYREG_PERI_MS_PPU_FX143_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012BC0UL)
#define CYREG_PERI_MS_PPU_FX143_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012BC4UL)
#define CYREG_PERI_MS_PPU_FX143_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012BD0UL)
#define CYREG_PERI_MS_PPU_FX143_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012BD4UL)
#define CYREG_PERI_MS_PPU_FX143_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012BD8UL)
#define CYREG_PERI_MS_PPU_FX143_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012BDCUL)
#define CYREG_PERI_MS_PPU_FX143_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012BE0UL)
#define CYREG_PERI_MS_PPU_FX143_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012BE4UL)
#define CYREG_PERI_MS_PPU_FX143_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012BF0UL)
#define CYREG_PERI_MS_PPU_FX143_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012BF4UL)
#define CYREG_PERI_MS_PPU_FX143_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012BF8UL)
#define CYREG_PERI_MS_PPU_FX143_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX144)
  */
#define CYREG_PERI_MS_PPU_FX144_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012C00UL)
#define CYREG_PERI_MS_PPU_FX144_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012C04UL)
#define CYREG_PERI_MS_PPU_FX144_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012C10UL)
#define CYREG_PERI_MS_PPU_FX144_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012C14UL)
#define CYREG_PERI_MS_PPU_FX144_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012C18UL)
#define CYREG_PERI_MS_PPU_FX144_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012C1CUL)
#define CYREG_PERI_MS_PPU_FX144_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012C20UL)
#define CYREG_PERI_MS_PPU_FX144_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012C24UL)
#define CYREG_PERI_MS_PPU_FX144_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012C30UL)
#define CYREG_PERI_MS_PPU_FX144_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012C34UL)
#define CYREG_PERI_MS_PPU_FX144_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012C38UL)
#define CYREG_PERI_MS_PPU_FX144_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX145)
  */
#define CYREG_PERI_MS_PPU_FX145_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012C40UL)
#define CYREG_PERI_MS_PPU_FX145_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012C44UL)
#define CYREG_PERI_MS_PPU_FX145_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012C50UL)
#define CYREG_PERI_MS_PPU_FX145_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012C54UL)
#define CYREG_PERI_MS_PPU_FX145_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012C58UL)
#define CYREG_PERI_MS_PPU_FX145_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012C5CUL)
#define CYREG_PERI_MS_PPU_FX145_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012C60UL)
#define CYREG_PERI_MS_PPU_FX145_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012C64UL)
#define CYREG_PERI_MS_PPU_FX145_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012C70UL)
#define CYREG_PERI_MS_PPU_FX145_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012C74UL)
#define CYREG_PERI_MS_PPU_FX145_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012C78UL)
#define CYREG_PERI_MS_PPU_FX145_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX146)
  */
#define CYREG_PERI_MS_PPU_FX146_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012C80UL)
#define CYREG_PERI_MS_PPU_FX146_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012C84UL)
#define CYREG_PERI_MS_PPU_FX146_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012C90UL)
#define CYREG_PERI_MS_PPU_FX146_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012C94UL)
#define CYREG_PERI_MS_PPU_FX146_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012C98UL)
#define CYREG_PERI_MS_PPU_FX146_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012C9CUL)
#define CYREG_PERI_MS_PPU_FX146_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012CA0UL)
#define CYREG_PERI_MS_PPU_FX146_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012CA4UL)
#define CYREG_PERI_MS_PPU_FX146_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012CB0UL)
#define CYREG_PERI_MS_PPU_FX146_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012CB4UL)
#define CYREG_PERI_MS_PPU_FX146_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012CB8UL)
#define CYREG_PERI_MS_PPU_FX146_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX147)
  */
#define CYREG_PERI_MS_PPU_FX147_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012CC0UL)
#define CYREG_PERI_MS_PPU_FX147_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012CC4UL)
#define CYREG_PERI_MS_PPU_FX147_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012CD0UL)
#define CYREG_PERI_MS_PPU_FX147_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012CD4UL)
#define CYREG_PERI_MS_PPU_FX147_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012CD8UL)
#define CYREG_PERI_MS_PPU_FX147_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012CDCUL)
#define CYREG_PERI_MS_PPU_FX147_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012CE0UL)
#define CYREG_PERI_MS_PPU_FX147_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012CE4UL)
#define CYREG_PERI_MS_PPU_FX147_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012CF0UL)
#define CYREG_PERI_MS_PPU_FX147_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012CF4UL)
#define CYREG_PERI_MS_PPU_FX147_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012CF8UL)
#define CYREG_PERI_MS_PPU_FX147_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX148)
  */
#define CYREG_PERI_MS_PPU_FX148_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012D00UL)
#define CYREG_PERI_MS_PPU_FX148_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012D04UL)
#define CYREG_PERI_MS_PPU_FX148_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012D10UL)
#define CYREG_PERI_MS_PPU_FX148_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012D14UL)
#define CYREG_PERI_MS_PPU_FX148_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012D18UL)
#define CYREG_PERI_MS_PPU_FX148_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012D1CUL)
#define CYREG_PERI_MS_PPU_FX148_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012D20UL)
#define CYREG_PERI_MS_PPU_FX148_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012D24UL)
#define CYREG_PERI_MS_PPU_FX148_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012D30UL)
#define CYREG_PERI_MS_PPU_FX148_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012D34UL)
#define CYREG_PERI_MS_PPU_FX148_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012D38UL)
#define CYREG_PERI_MS_PPU_FX148_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX149)
  */
#define CYREG_PERI_MS_PPU_FX149_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012D40UL)
#define CYREG_PERI_MS_PPU_FX149_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012D44UL)
#define CYREG_PERI_MS_PPU_FX149_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012D50UL)
#define CYREG_PERI_MS_PPU_FX149_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012D54UL)
#define CYREG_PERI_MS_PPU_FX149_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012D58UL)
#define CYREG_PERI_MS_PPU_FX149_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012D5CUL)
#define CYREG_PERI_MS_PPU_FX149_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012D60UL)
#define CYREG_PERI_MS_PPU_FX149_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012D64UL)
#define CYREG_PERI_MS_PPU_FX149_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012D70UL)
#define CYREG_PERI_MS_PPU_FX149_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012D74UL)
#define CYREG_PERI_MS_PPU_FX149_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012D78UL)
#define CYREG_PERI_MS_PPU_FX149_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX150)
  */
#define CYREG_PERI_MS_PPU_FX150_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012D80UL)
#define CYREG_PERI_MS_PPU_FX150_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012D84UL)
#define CYREG_PERI_MS_PPU_FX150_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012D90UL)
#define CYREG_PERI_MS_PPU_FX150_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012D94UL)
#define CYREG_PERI_MS_PPU_FX150_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012D98UL)
#define CYREG_PERI_MS_PPU_FX150_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012D9CUL)
#define CYREG_PERI_MS_PPU_FX150_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012DA0UL)
#define CYREG_PERI_MS_PPU_FX150_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012DA4UL)
#define CYREG_PERI_MS_PPU_FX150_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012DB0UL)
#define CYREG_PERI_MS_PPU_FX150_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012DB4UL)
#define CYREG_PERI_MS_PPU_FX150_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012DB8UL)
#define CYREG_PERI_MS_PPU_FX150_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX151)
  */
#define CYREG_PERI_MS_PPU_FX151_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012DC0UL)
#define CYREG_PERI_MS_PPU_FX151_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012DC4UL)
#define CYREG_PERI_MS_PPU_FX151_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012DD0UL)
#define CYREG_PERI_MS_PPU_FX151_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012DD4UL)
#define CYREG_PERI_MS_PPU_FX151_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012DD8UL)
#define CYREG_PERI_MS_PPU_FX151_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012DDCUL)
#define CYREG_PERI_MS_PPU_FX151_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012DE0UL)
#define CYREG_PERI_MS_PPU_FX151_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012DE4UL)
#define CYREG_PERI_MS_PPU_FX151_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012DF0UL)
#define CYREG_PERI_MS_PPU_FX151_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012DF4UL)
#define CYREG_PERI_MS_PPU_FX151_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012DF8UL)
#define CYREG_PERI_MS_PPU_FX151_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX152)
  */
#define CYREG_PERI_MS_PPU_FX152_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012E00UL)
#define CYREG_PERI_MS_PPU_FX152_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012E04UL)
#define CYREG_PERI_MS_PPU_FX152_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012E10UL)
#define CYREG_PERI_MS_PPU_FX152_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012E14UL)
#define CYREG_PERI_MS_PPU_FX152_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012E18UL)
#define CYREG_PERI_MS_PPU_FX152_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012E1CUL)
#define CYREG_PERI_MS_PPU_FX152_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012E20UL)
#define CYREG_PERI_MS_PPU_FX152_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012E24UL)
#define CYREG_PERI_MS_PPU_FX152_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012E30UL)
#define CYREG_PERI_MS_PPU_FX152_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012E34UL)
#define CYREG_PERI_MS_PPU_FX152_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012E38UL)
#define CYREG_PERI_MS_PPU_FX152_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX153)
  */
#define CYREG_PERI_MS_PPU_FX153_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012E40UL)
#define CYREG_PERI_MS_PPU_FX153_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012E44UL)
#define CYREG_PERI_MS_PPU_FX153_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012E50UL)
#define CYREG_PERI_MS_PPU_FX153_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012E54UL)
#define CYREG_PERI_MS_PPU_FX153_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012E58UL)
#define CYREG_PERI_MS_PPU_FX153_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012E5CUL)
#define CYREG_PERI_MS_PPU_FX153_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012E60UL)
#define CYREG_PERI_MS_PPU_FX153_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012E64UL)
#define CYREG_PERI_MS_PPU_FX153_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012E70UL)
#define CYREG_PERI_MS_PPU_FX153_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012E74UL)
#define CYREG_PERI_MS_PPU_FX153_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012E78UL)
#define CYREG_PERI_MS_PPU_FX153_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX154)
  */
#define CYREG_PERI_MS_PPU_FX154_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012E80UL)
#define CYREG_PERI_MS_PPU_FX154_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012E84UL)
#define CYREG_PERI_MS_PPU_FX154_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012E90UL)
#define CYREG_PERI_MS_PPU_FX154_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012E94UL)
#define CYREG_PERI_MS_PPU_FX154_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012E98UL)
#define CYREG_PERI_MS_PPU_FX154_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012E9CUL)
#define CYREG_PERI_MS_PPU_FX154_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012EA0UL)
#define CYREG_PERI_MS_PPU_FX154_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012EA4UL)
#define CYREG_PERI_MS_PPU_FX154_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012EB0UL)
#define CYREG_PERI_MS_PPU_FX154_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012EB4UL)
#define CYREG_PERI_MS_PPU_FX154_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012EB8UL)
#define CYREG_PERI_MS_PPU_FX154_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX155)
  */
#define CYREG_PERI_MS_PPU_FX155_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012EC0UL)
#define CYREG_PERI_MS_PPU_FX155_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012EC4UL)
#define CYREG_PERI_MS_PPU_FX155_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012ED0UL)
#define CYREG_PERI_MS_PPU_FX155_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012ED4UL)
#define CYREG_PERI_MS_PPU_FX155_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012ED8UL)
#define CYREG_PERI_MS_PPU_FX155_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012EDCUL)
#define CYREG_PERI_MS_PPU_FX155_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012EE0UL)
#define CYREG_PERI_MS_PPU_FX155_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012EE4UL)
#define CYREG_PERI_MS_PPU_FX155_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012EF0UL)
#define CYREG_PERI_MS_PPU_FX155_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012EF4UL)
#define CYREG_PERI_MS_PPU_FX155_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012EF8UL)
#define CYREG_PERI_MS_PPU_FX155_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX156)
  */
#define CYREG_PERI_MS_PPU_FX156_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012F00UL)
#define CYREG_PERI_MS_PPU_FX156_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012F04UL)
#define CYREG_PERI_MS_PPU_FX156_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012F10UL)
#define CYREG_PERI_MS_PPU_FX156_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012F14UL)
#define CYREG_PERI_MS_PPU_FX156_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012F18UL)
#define CYREG_PERI_MS_PPU_FX156_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012F1CUL)
#define CYREG_PERI_MS_PPU_FX156_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012F20UL)
#define CYREG_PERI_MS_PPU_FX156_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012F24UL)
#define CYREG_PERI_MS_PPU_FX156_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012F30UL)
#define CYREG_PERI_MS_PPU_FX156_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012F34UL)
#define CYREG_PERI_MS_PPU_FX156_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012F38UL)
#define CYREG_PERI_MS_PPU_FX156_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX157)
  */
#define CYREG_PERI_MS_PPU_FX157_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012F40UL)
#define CYREG_PERI_MS_PPU_FX157_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012F44UL)
#define CYREG_PERI_MS_PPU_FX157_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012F50UL)
#define CYREG_PERI_MS_PPU_FX157_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012F54UL)
#define CYREG_PERI_MS_PPU_FX157_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012F58UL)
#define CYREG_PERI_MS_PPU_FX157_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012F5CUL)
#define CYREG_PERI_MS_PPU_FX157_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012F60UL)
#define CYREG_PERI_MS_PPU_FX157_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012F64UL)
#define CYREG_PERI_MS_PPU_FX157_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012F70UL)
#define CYREG_PERI_MS_PPU_FX157_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012F74UL)
#define CYREG_PERI_MS_PPU_FX157_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012F78UL)
#define CYREG_PERI_MS_PPU_FX157_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX158)
  */
#define CYREG_PERI_MS_PPU_FX158_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012F80UL)
#define CYREG_PERI_MS_PPU_FX158_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012F84UL)
#define CYREG_PERI_MS_PPU_FX158_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012F90UL)
#define CYREG_PERI_MS_PPU_FX158_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012F94UL)
#define CYREG_PERI_MS_PPU_FX158_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012F98UL)
#define CYREG_PERI_MS_PPU_FX158_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012F9CUL)
#define CYREG_PERI_MS_PPU_FX158_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012FA0UL)
#define CYREG_PERI_MS_PPU_FX158_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012FA4UL)
#define CYREG_PERI_MS_PPU_FX158_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012FB0UL)
#define CYREG_PERI_MS_PPU_FX158_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012FB4UL)
#define CYREG_PERI_MS_PPU_FX158_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012FB8UL)
#define CYREG_PERI_MS_PPU_FX158_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX159)
  */
#define CYREG_PERI_MS_PPU_FX159_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40012FC0UL)
#define CYREG_PERI_MS_PPU_FX159_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40012FC4UL)
#define CYREG_PERI_MS_PPU_FX159_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40012FD0UL)
#define CYREG_PERI_MS_PPU_FX159_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40012FD4UL)
#define CYREG_PERI_MS_PPU_FX159_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40012FD8UL)
#define CYREG_PERI_MS_PPU_FX159_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40012FDCUL)
#define CYREG_PERI_MS_PPU_FX159_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40012FE0UL)
#define CYREG_PERI_MS_PPU_FX159_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40012FE4UL)
#define CYREG_PERI_MS_PPU_FX159_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40012FF0UL)
#define CYREG_PERI_MS_PPU_FX159_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40012FF4UL)
#define CYREG_PERI_MS_PPU_FX159_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40012FF8UL)
#define CYREG_PERI_MS_PPU_FX159_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40012FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX160)
  */
#define CYREG_PERI_MS_PPU_FX160_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013000UL)
#define CYREG_PERI_MS_PPU_FX160_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013004UL)
#define CYREG_PERI_MS_PPU_FX160_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013010UL)
#define CYREG_PERI_MS_PPU_FX160_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013014UL)
#define CYREG_PERI_MS_PPU_FX160_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013018UL)
#define CYREG_PERI_MS_PPU_FX160_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001301CUL)
#define CYREG_PERI_MS_PPU_FX160_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013020UL)
#define CYREG_PERI_MS_PPU_FX160_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013024UL)
#define CYREG_PERI_MS_PPU_FX160_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013030UL)
#define CYREG_PERI_MS_PPU_FX160_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013034UL)
#define CYREG_PERI_MS_PPU_FX160_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013038UL)
#define CYREG_PERI_MS_PPU_FX160_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001303CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX161)
  */
#define CYREG_PERI_MS_PPU_FX161_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013040UL)
#define CYREG_PERI_MS_PPU_FX161_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013044UL)
#define CYREG_PERI_MS_PPU_FX161_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013050UL)
#define CYREG_PERI_MS_PPU_FX161_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013054UL)
#define CYREG_PERI_MS_PPU_FX161_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013058UL)
#define CYREG_PERI_MS_PPU_FX161_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001305CUL)
#define CYREG_PERI_MS_PPU_FX161_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013060UL)
#define CYREG_PERI_MS_PPU_FX161_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013064UL)
#define CYREG_PERI_MS_PPU_FX161_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013070UL)
#define CYREG_PERI_MS_PPU_FX161_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013074UL)
#define CYREG_PERI_MS_PPU_FX161_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013078UL)
#define CYREG_PERI_MS_PPU_FX161_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001307CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX162)
  */
#define CYREG_PERI_MS_PPU_FX162_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013080UL)
#define CYREG_PERI_MS_PPU_FX162_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013084UL)
#define CYREG_PERI_MS_PPU_FX162_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013090UL)
#define CYREG_PERI_MS_PPU_FX162_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013094UL)
#define CYREG_PERI_MS_PPU_FX162_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013098UL)
#define CYREG_PERI_MS_PPU_FX162_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001309CUL)
#define CYREG_PERI_MS_PPU_FX162_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400130A0UL)
#define CYREG_PERI_MS_PPU_FX162_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400130A4UL)
#define CYREG_PERI_MS_PPU_FX162_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400130B0UL)
#define CYREG_PERI_MS_PPU_FX162_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400130B4UL)
#define CYREG_PERI_MS_PPU_FX162_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400130B8UL)
#define CYREG_PERI_MS_PPU_FX162_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400130BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX163)
  */
#define CYREG_PERI_MS_PPU_FX163_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400130C0UL)
#define CYREG_PERI_MS_PPU_FX163_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400130C4UL)
#define CYREG_PERI_MS_PPU_FX163_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400130D0UL)
#define CYREG_PERI_MS_PPU_FX163_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400130D4UL)
#define CYREG_PERI_MS_PPU_FX163_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400130D8UL)
#define CYREG_PERI_MS_PPU_FX163_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400130DCUL)
#define CYREG_PERI_MS_PPU_FX163_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400130E0UL)
#define CYREG_PERI_MS_PPU_FX163_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400130E4UL)
#define CYREG_PERI_MS_PPU_FX163_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400130F0UL)
#define CYREG_PERI_MS_PPU_FX163_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400130F4UL)
#define CYREG_PERI_MS_PPU_FX163_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400130F8UL)
#define CYREG_PERI_MS_PPU_FX163_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400130FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX164)
  */
#define CYREG_PERI_MS_PPU_FX164_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013100UL)
#define CYREG_PERI_MS_PPU_FX164_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013104UL)
#define CYREG_PERI_MS_PPU_FX164_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013110UL)
#define CYREG_PERI_MS_PPU_FX164_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013114UL)
#define CYREG_PERI_MS_PPU_FX164_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013118UL)
#define CYREG_PERI_MS_PPU_FX164_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001311CUL)
#define CYREG_PERI_MS_PPU_FX164_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013120UL)
#define CYREG_PERI_MS_PPU_FX164_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013124UL)
#define CYREG_PERI_MS_PPU_FX164_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013130UL)
#define CYREG_PERI_MS_PPU_FX164_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013134UL)
#define CYREG_PERI_MS_PPU_FX164_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013138UL)
#define CYREG_PERI_MS_PPU_FX164_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001313CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX165)
  */
#define CYREG_PERI_MS_PPU_FX165_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013140UL)
#define CYREG_PERI_MS_PPU_FX165_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013144UL)
#define CYREG_PERI_MS_PPU_FX165_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013150UL)
#define CYREG_PERI_MS_PPU_FX165_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013154UL)
#define CYREG_PERI_MS_PPU_FX165_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013158UL)
#define CYREG_PERI_MS_PPU_FX165_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001315CUL)
#define CYREG_PERI_MS_PPU_FX165_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013160UL)
#define CYREG_PERI_MS_PPU_FX165_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013164UL)
#define CYREG_PERI_MS_PPU_FX165_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013170UL)
#define CYREG_PERI_MS_PPU_FX165_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013174UL)
#define CYREG_PERI_MS_PPU_FX165_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013178UL)
#define CYREG_PERI_MS_PPU_FX165_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001317CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX166)
  */
#define CYREG_PERI_MS_PPU_FX166_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013180UL)
#define CYREG_PERI_MS_PPU_FX166_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013184UL)
#define CYREG_PERI_MS_PPU_FX166_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013190UL)
#define CYREG_PERI_MS_PPU_FX166_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013194UL)
#define CYREG_PERI_MS_PPU_FX166_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013198UL)
#define CYREG_PERI_MS_PPU_FX166_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001319CUL)
#define CYREG_PERI_MS_PPU_FX166_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400131A0UL)
#define CYREG_PERI_MS_PPU_FX166_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400131A4UL)
#define CYREG_PERI_MS_PPU_FX166_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400131B0UL)
#define CYREG_PERI_MS_PPU_FX166_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400131B4UL)
#define CYREG_PERI_MS_PPU_FX166_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400131B8UL)
#define CYREG_PERI_MS_PPU_FX166_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400131BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX167)
  */
#define CYREG_PERI_MS_PPU_FX167_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400131C0UL)
#define CYREG_PERI_MS_PPU_FX167_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400131C4UL)
#define CYREG_PERI_MS_PPU_FX167_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400131D0UL)
#define CYREG_PERI_MS_PPU_FX167_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400131D4UL)
#define CYREG_PERI_MS_PPU_FX167_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400131D8UL)
#define CYREG_PERI_MS_PPU_FX167_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400131DCUL)
#define CYREG_PERI_MS_PPU_FX167_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400131E0UL)
#define CYREG_PERI_MS_PPU_FX167_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400131E4UL)
#define CYREG_PERI_MS_PPU_FX167_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400131F0UL)
#define CYREG_PERI_MS_PPU_FX167_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400131F4UL)
#define CYREG_PERI_MS_PPU_FX167_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400131F8UL)
#define CYREG_PERI_MS_PPU_FX167_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400131FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX168)
  */
#define CYREG_PERI_MS_PPU_FX168_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013200UL)
#define CYREG_PERI_MS_PPU_FX168_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013204UL)
#define CYREG_PERI_MS_PPU_FX168_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013210UL)
#define CYREG_PERI_MS_PPU_FX168_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013214UL)
#define CYREG_PERI_MS_PPU_FX168_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013218UL)
#define CYREG_PERI_MS_PPU_FX168_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001321CUL)
#define CYREG_PERI_MS_PPU_FX168_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013220UL)
#define CYREG_PERI_MS_PPU_FX168_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013224UL)
#define CYREG_PERI_MS_PPU_FX168_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013230UL)
#define CYREG_PERI_MS_PPU_FX168_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013234UL)
#define CYREG_PERI_MS_PPU_FX168_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013238UL)
#define CYREG_PERI_MS_PPU_FX168_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001323CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX169)
  */
#define CYREG_PERI_MS_PPU_FX169_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013240UL)
#define CYREG_PERI_MS_PPU_FX169_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013244UL)
#define CYREG_PERI_MS_PPU_FX169_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013250UL)
#define CYREG_PERI_MS_PPU_FX169_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013254UL)
#define CYREG_PERI_MS_PPU_FX169_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013258UL)
#define CYREG_PERI_MS_PPU_FX169_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001325CUL)
#define CYREG_PERI_MS_PPU_FX169_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013260UL)
#define CYREG_PERI_MS_PPU_FX169_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013264UL)
#define CYREG_PERI_MS_PPU_FX169_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013270UL)
#define CYREG_PERI_MS_PPU_FX169_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013274UL)
#define CYREG_PERI_MS_PPU_FX169_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013278UL)
#define CYREG_PERI_MS_PPU_FX169_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001327CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX170)
  */
#define CYREG_PERI_MS_PPU_FX170_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013280UL)
#define CYREG_PERI_MS_PPU_FX170_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013284UL)
#define CYREG_PERI_MS_PPU_FX170_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013290UL)
#define CYREG_PERI_MS_PPU_FX170_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013294UL)
#define CYREG_PERI_MS_PPU_FX170_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013298UL)
#define CYREG_PERI_MS_PPU_FX170_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001329CUL)
#define CYREG_PERI_MS_PPU_FX170_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400132A0UL)
#define CYREG_PERI_MS_PPU_FX170_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400132A4UL)
#define CYREG_PERI_MS_PPU_FX170_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400132B0UL)
#define CYREG_PERI_MS_PPU_FX170_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400132B4UL)
#define CYREG_PERI_MS_PPU_FX170_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400132B8UL)
#define CYREG_PERI_MS_PPU_FX170_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400132BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX171)
  */
#define CYREG_PERI_MS_PPU_FX171_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400132C0UL)
#define CYREG_PERI_MS_PPU_FX171_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400132C4UL)
#define CYREG_PERI_MS_PPU_FX171_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400132D0UL)
#define CYREG_PERI_MS_PPU_FX171_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400132D4UL)
#define CYREG_PERI_MS_PPU_FX171_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400132D8UL)
#define CYREG_PERI_MS_PPU_FX171_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400132DCUL)
#define CYREG_PERI_MS_PPU_FX171_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400132E0UL)
#define CYREG_PERI_MS_PPU_FX171_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400132E4UL)
#define CYREG_PERI_MS_PPU_FX171_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400132F0UL)
#define CYREG_PERI_MS_PPU_FX171_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400132F4UL)
#define CYREG_PERI_MS_PPU_FX171_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400132F8UL)
#define CYREG_PERI_MS_PPU_FX171_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400132FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX172)
  */
#define CYREG_PERI_MS_PPU_FX172_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013300UL)
#define CYREG_PERI_MS_PPU_FX172_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013304UL)
#define CYREG_PERI_MS_PPU_FX172_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013310UL)
#define CYREG_PERI_MS_PPU_FX172_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013314UL)
#define CYREG_PERI_MS_PPU_FX172_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013318UL)
#define CYREG_PERI_MS_PPU_FX172_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001331CUL)
#define CYREG_PERI_MS_PPU_FX172_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013320UL)
#define CYREG_PERI_MS_PPU_FX172_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013324UL)
#define CYREG_PERI_MS_PPU_FX172_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013330UL)
#define CYREG_PERI_MS_PPU_FX172_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013334UL)
#define CYREG_PERI_MS_PPU_FX172_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013338UL)
#define CYREG_PERI_MS_PPU_FX172_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001333CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX173)
  */
#define CYREG_PERI_MS_PPU_FX173_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013340UL)
#define CYREG_PERI_MS_PPU_FX173_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013344UL)
#define CYREG_PERI_MS_PPU_FX173_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013350UL)
#define CYREG_PERI_MS_PPU_FX173_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013354UL)
#define CYREG_PERI_MS_PPU_FX173_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013358UL)
#define CYREG_PERI_MS_PPU_FX173_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001335CUL)
#define CYREG_PERI_MS_PPU_FX173_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013360UL)
#define CYREG_PERI_MS_PPU_FX173_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013364UL)
#define CYREG_PERI_MS_PPU_FX173_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013370UL)
#define CYREG_PERI_MS_PPU_FX173_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013374UL)
#define CYREG_PERI_MS_PPU_FX173_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013378UL)
#define CYREG_PERI_MS_PPU_FX173_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001337CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX174)
  */
#define CYREG_PERI_MS_PPU_FX174_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013380UL)
#define CYREG_PERI_MS_PPU_FX174_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013384UL)
#define CYREG_PERI_MS_PPU_FX174_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013390UL)
#define CYREG_PERI_MS_PPU_FX174_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013394UL)
#define CYREG_PERI_MS_PPU_FX174_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013398UL)
#define CYREG_PERI_MS_PPU_FX174_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001339CUL)
#define CYREG_PERI_MS_PPU_FX174_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400133A0UL)
#define CYREG_PERI_MS_PPU_FX174_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400133A4UL)
#define CYREG_PERI_MS_PPU_FX174_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400133B0UL)
#define CYREG_PERI_MS_PPU_FX174_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400133B4UL)
#define CYREG_PERI_MS_PPU_FX174_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400133B8UL)
#define CYREG_PERI_MS_PPU_FX174_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400133BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX175)
  */
#define CYREG_PERI_MS_PPU_FX175_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400133C0UL)
#define CYREG_PERI_MS_PPU_FX175_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400133C4UL)
#define CYREG_PERI_MS_PPU_FX175_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400133D0UL)
#define CYREG_PERI_MS_PPU_FX175_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400133D4UL)
#define CYREG_PERI_MS_PPU_FX175_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400133D8UL)
#define CYREG_PERI_MS_PPU_FX175_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400133DCUL)
#define CYREG_PERI_MS_PPU_FX175_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400133E0UL)
#define CYREG_PERI_MS_PPU_FX175_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400133E4UL)
#define CYREG_PERI_MS_PPU_FX175_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400133F0UL)
#define CYREG_PERI_MS_PPU_FX175_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400133F4UL)
#define CYREG_PERI_MS_PPU_FX175_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400133F8UL)
#define CYREG_PERI_MS_PPU_FX175_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400133FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX176)
  */
#define CYREG_PERI_MS_PPU_FX176_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013400UL)
#define CYREG_PERI_MS_PPU_FX176_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013404UL)
#define CYREG_PERI_MS_PPU_FX176_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013410UL)
#define CYREG_PERI_MS_PPU_FX176_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013414UL)
#define CYREG_PERI_MS_PPU_FX176_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013418UL)
#define CYREG_PERI_MS_PPU_FX176_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001341CUL)
#define CYREG_PERI_MS_PPU_FX176_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013420UL)
#define CYREG_PERI_MS_PPU_FX176_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013424UL)
#define CYREG_PERI_MS_PPU_FX176_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013430UL)
#define CYREG_PERI_MS_PPU_FX176_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013434UL)
#define CYREG_PERI_MS_PPU_FX176_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013438UL)
#define CYREG_PERI_MS_PPU_FX176_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001343CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX177)
  */
#define CYREG_PERI_MS_PPU_FX177_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013440UL)
#define CYREG_PERI_MS_PPU_FX177_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013444UL)
#define CYREG_PERI_MS_PPU_FX177_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013450UL)
#define CYREG_PERI_MS_PPU_FX177_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013454UL)
#define CYREG_PERI_MS_PPU_FX177_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013458UL)
#define CYREG_PERI_MS_PPU_FX177_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001345CUL)
#define CYREG_PERI_MS_PPU_FX177_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013460UL)
#define CYREG_PERI_MS_PPU_FX177_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013464UL)
#define CYREG_PERI_MS_PPU_FX177_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013470UL)
#define CYREG_PERI_MS_PPU_FX177_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013474UL)
#define CYREG_PERI_MS_PPU_FX177_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013478UL)
#define CYREG_PERI_MS_PPU_FX177_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001347CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX178)
  */
#define CYREG_PERI_MS_PPU_FX178_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013480UL)
#define CYREG_PERI_MS_PPU_FX178_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013484UL)
#define CYREG_PERI_MS_PPU_FX178_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013490UL)
#define CYREG_PERI_MS_PPU_FX178_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013494UL)
#define CYREG_PERI_MS_PPU_FX178_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013498UL)
#define CYREG_PERI_MS_PPU_FX178_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001349CUL)
#define CYREG_PERI_MS_PPU_FX178_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400134A0UL)
#define CYREG_PERI_MS_PPU_FX178_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400134A4UL)
#define CYREG_PERI_MS_PPU_FX178_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400134B0UL)
#define CYREG_PERI_MS_PPU_FX178_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400134B4UL)
#define CYREG_PERI_MS_PPU_FX178_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400134B8UL)
#define CYREG_PERI_MS_PPU_FX178_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400134BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX179)
  */
#define CYREG_PERI_MS_PPU_FX179_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400134C0UL)
#define CYREG_PERI_MS_PPU_FX179_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400134C4UL)
#define CYREG_PERI_MS_PPU_FX179_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400134D0UL)
#define CYREG_PERI_MS_PPU_FX179_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400134D4UL)
#define CYREG_PERI_MS_PPU_FX179_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400134D8UL)
#define CYREG_PERI_MS_PPU_FX179_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400134DCUL)
#define CYREG_PERI_MS_PPU_FX179_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400134E0UL)
#define CYREG_PERI_MS_PPU_FX179_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400134E4UL)
#define CYREG_PERI_MS_PPU_FX179_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400134F0UL)
#define CYREG_PERI_MS_PPU_FX179_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400134F4UL)
#define CYREG_PERI_MS_PPU_FX179_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400134F8UL)
#define CYREG_PERI_MS_PPU_FX179_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400134FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX180)
  */
#define CYREG_PERI_MS_PPU_FX180_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013500UL)
#define CYREG_PERI_MS_PPU_FX180_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013504UL)
#define CYREG_PERI_MS_PPU_FX180_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013510UL)
#define CYREG_PERI_MS_PPU_FX180_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013514UL)
#define CYREG_PERI_MS_PPU_FX180_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013518UL)
#define CYREG_PERI_MS_PPU_FX180_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001351CUL)
#define CYREG_PERI_MS_PPU_FX180_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013520UL)
#define CYREG_PERI_MS_PPU_FX180_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013524UL)
#define CYREG_PERI_MS_PPU_FX180_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013530UL)
#define CYREG_PERI_MS_PPU_FX180_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013534UL)
#define CYREG_PERI_MS_PPU_FX180_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013538UL)
#define CYREG_PERI_MS_PPU_FX180_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001353CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX181)
  */
#define CYREG_PERI_MS_PPU_FX181_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013540UL)
#define CYREG_PERI_MS_PPU_FX181_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013544UL)
#define CYREG_PERI_MS_PPU_FX181_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013550UL)
#define CYREG_PERI_MS_PPU_FX181_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013554UL)
#define CYREG_PERI_MS_PPU_FX181_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013558UL)
#define CYREG_PERI_MS_PPU_FX181_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001355CUL)
#define CYREG_PERI_MS_PPU_FX181_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013560UL)
#define CYREG_PERI_MS_PPU_FX181_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013564UL)
#define CYREG_PERI_MS_PPU_FX181_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013570UL)
#define CYREG_PERI_MS_PPU_FX181_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013574UL)
#define CYREG_PERI_MS_PPU_FX181_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013578UL)
#define CYREG_PERI_MS_PPU_FX181_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001357CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX182)
  */
#define CYREG_PERI_MS_PPU_FX182_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013580UL)
#define CYREG_PERI_MS_PPU_FX182_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013584UL)
#define CYREG_PERI_MS_PPU_FX182_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013590UL)
#define CYREG_PERI_MS_PPU_FX182_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013594UL)
#define CYREG_PERI_MS_PPU_FX182_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013598UL)
#define CYREG_PERI_MS_PPU_FX182_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001359CUL)
#define CYREG_PERI_MS_PPU_FX182_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400135A0UL)
#define CYREG_PERI_MS_PPU_FX182_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400135A4UL)
#define CYREG_PERI_MS_PPU_FX182_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400135B0UL)
#define CYREG_PERI_MS_PPU_FX182_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400135B4UL)
#define CYREG_PERI_MS_PPU_FX182_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400135B8UL)
#define CYREG_PERI_MS_PPU_FX182_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400135BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX183)
  */
#define CYREG_PERI_MS_PPU_FX183_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400135C0UL)
#define CYREG_PERI_MS_PPU_FX183_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400135C4UL)
#define CYREG_PERI_MS_PPU_FX183_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400135D0UL)
#define CYREG_PERI_MS_PPU_FX183_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400135D4UL)
#define CYREG_PERI_MS_PPU_FX183_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400135D8UL)
#define CYREG_PERI_MS_PPU_FX183_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400135DCUL)
#define CYREG_PERI_MS_PPU_FX183_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400135E0UL)
#define CYREG_PERI_MS_PPU_FX183_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400135E4UL)
#define CYREG_PERI_MS_PPU_FX183_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400135F0UL)
#define CYREG_PERI_MS_PPU_FX183_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400135F4UL)
#define CYREG_PERI_MS_PPU_FX183_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400135F8UL)
#define CYREG_PERI_MS_PPU_FX183_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400135FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX184)
  */
#define CYREG_PERI_MS_PPU_FX184_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013600UL)
#define CYREG_PERI_MS_PPU_FX184_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013604UL)
#define CYREG_PERI_MS_PPU_FX184_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013610UL)
#define CYREG_PERI_MS_PPU_FX184_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013614UL)
#define CYREG_PERI_MS_PPU_FX184_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013618UL)
#define CYREG_PERI_MS_PPU_FX184_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001361CUL)
#define CYREG_PERI_MS_PPU_FX184_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013620UL)
#define CYREG_PERI_MS_PPU_FX184_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013624UL)
#define CYREG_PERI_MS_PPU_FX184_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013630UL)
#define CYREG_PERI_MS_PPU_FX184_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013634UL)
#define CYREG_PERI_MS_PPU_FX184_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013638UL)
#define CYREG_PERI_MS_PPU_FX184_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001363CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX185)
  */
#define CYREG_PERI_MS_PPU_FX185_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013640UL)
#define CYREG_PERI_MS_PPU_FX185_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013644UL)
#define CYREG_PERI_MS_PPU_FX185_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013650UL)
#define CYREG_PERI_MS_PPU_FX185_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013654UL)
#define CYREG_PERI_MS_PPU_FX185_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013658UL)
#define CYREG_PERI_MS_PPU_FX185_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001365CUL)
#define CYREG_PERI_MS_PPU_FX185_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013660UL)
#define CYREG_PERI_MS_PPU_FX185_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013664UL)
#define CYREG_PERI_MS_PPU_FX185_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013670UL)
#define CYREG_PERI_MS_PPU_FX185_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013674UL)
#define CYREG_PERI_MS_PPU_FX185_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013678UL)
#define CYREG_PERI_MS_PPU_FX185_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001367CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX186)
  */
#define CYREG_PERI_MS_PPU_FX186_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013680UL)
#define CYREG_PERI_MS_PPU_FX186_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013684UL)
#define CYREG_PERI_MS_PPU_FX186_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013690UL)
#define CYREG_PERI_MS_PPU_FX186_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013694UL)
#define CYREG_PERI_MS_PPU_FX186_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013698UL)
#define CYREG_PERI_MS_PPU_FX186_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001369CUL)
#define CYREG_PERI_MS_PPU_FX186_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400136A0UL)
#define CYREG_PERI_MS_PPU_FX186_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400136A4UL)
#define CYREG_PERI_MS_PPU_FX186_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400136B0UL)
#define CYREG_PERI_MS_PPU_FX186_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400136B4UL)
#define CYREG_PERI_MS_PPU_FX186_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400136B8UL)
#define CYREG_PERI_MS_PPU_FX186_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400136BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX187)
  */
#define CYREG_PERI_MS_PPU_FX187_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400136C0UL)
#define CYREG_PERI_MS_PPU_FX187_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400136C4UL)
#define CYREG_PERI_MS_PPU_FX187_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400136D0UL)
#define CYREG_PERI_MS_PPU_FX187_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400136D4UL)
#define CYREG_PERI_MS_PPU_FX187_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400136D8UL)
#define CYREG_PERI_MS_PPU_FX187_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400136DCUL)
#define CYREG_PERI_MS_PPU_FX187_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400136E0UL)
#define CYREG_PERI_MS_PPU_FX187_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400136E4UL)
#define CYREG_PERI_MS_PPU_FX187_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400136F0UL)
#define CYREG_PERI_MS_PPU_FX187_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400136F4UL)
#define CYREG_PERI_MS_PPU_FX187_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400136F8UL)
#define CYREG_PERI_MS_PPU_FX187_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400136FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX188)
  */
#define CYREG_PERI_MS_PPU_FX188_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013700UL)
#define CYREG_PERI_MS_PPU_FX188_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013704UL)
#define CYREG_PERI_MS_PPU_FX188_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013710UL)
#define CYREG_PERI_MS_PPU_FX188_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013714UL)
#define CYREG_PERI_MS_PPU_FX188_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013718UL)
#define CYREG_PERI_MS_PPU_FX188_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001371CUL)
#define CYREG_PERI_MS_PPU_FX188_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013720UL)
#define CYREG_PERI_MS_PPU_FX188_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013724UL)
#define CYREG_PERI_MS_PPU_FX188_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013730UL)
#define CYREG_PERI_MS_PPU_FX188_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013734UL)
#define CYREG_PERI_MS_PPU_FX188_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013738UL)
#define CYREG_PERI_MS_PPU_FX188_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001373CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX189)
  */
#define CYREG_PERI_MS_PPU_FX189_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013740UL)
#define CYREG_PERI_MS_PPU_FX189_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013744UL)
#define CYREG_PERI_MS_PPU_FX189_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013750UL)
#define CYREG_PERI_MS_PPU_FX189_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013754UL)
#define CYREG_PERI_MS_PPU_FX189_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013758UL)
#define CYREG_PERI_MS_PPU_FX189_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001375CUL)
#define CYREG_PERI_MS_PPU_FX189_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013760UL)
#define CYREG_PERI_MS_PPU_FX189_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013764UL)
#define CYREG_PERI_MS_PPU_FX189_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013770UL)
#define CYREG_PERI_MS_PPU_FX189_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013774UL)
#define CYREG_PERI_MS_PPU_FX189_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013778UL)
#define CYREG_PERI_MS_PPU_FX189_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001377CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX190)
  */
#define CYREG_PERI_MS_PPU_FX190_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013780UL)
#define CYREG_PERI_MS_PPU_FX190_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013784UL)
#define CYREG_PERI_MS_PPU_FX190_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013790UL)
#define CYREG_PERI_MS_PPU_FX190_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013794UL)
#define CYREG_PERI_MS_PPU_FX190_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013798UL)
#define CYREG_PERI_MS_PPU_FX190_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001379CUL)
#define CYREG_PERI_MS_PPU_FX190_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400137A0UL)
#define CYREG_PERI_MS_PPU_FX190_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400137A4UL)
#define CYREG_PERI_MS_PPU_FX190_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400137B0UL)
#define CYREG_PERI_MS_PPU_FX190_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400137B4UL)
#define CYREG_PERI_MS_PPU_FX190_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400137B8UL)
#define CYREG_PERI_MS_PPU_FX190_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400137BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX191)
  */
#define CYREG_PERI_MS_PPU_FX191_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400137C0UL)
#define CYREG_PERI_MS_PPU_FX191_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400137C4UL)
#define CYREG_PERI_MS_PPU_FX191_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400137D0UL)
#define CYREG_PERI_MS_PPU_FX191_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400137D4UL)
#define CYREG_PERI_MS_PPU_FX191_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400137D8UL)
#define CYREG_PERI_MS_PPU_FX191_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400137DCUL)
#define CYREG_PERI_MS_PPU_FX191_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400137E0UL)
#define CYREG_PERI_MS_PPU_FX191_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400137E4UL)
#define CYREG_PERI_MS_PPU_FX191_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400137F0UL)
#define CYREG_PERI_MS_PPU_FX191_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400137F4UL)
#define CYREG_PERI_MS_PPU_FX191_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400137F8UL)
#define CYREG_PERI_MS_PPU_FX191_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400137FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX192)
  */
#define CYREG_PERI_MS_PPU_FX192_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013800UL)
#define CYREG_PERI_MS_PPU_FX192_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013804UL)
#define CYREG_PERI_MS_PPU_FX192_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013810UL)
#define CYREG_PERI_MS_PPU_FX192_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013814UL)
#define CYREG_PERI_MS_PPU_FX192_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013818UL)
#define CYREG_PERI_MS_PPU_FX192_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001381CUL)
#define CYREG_PERI_MS_PPU_FX192_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013820UL)
#define CYREG_PERI_MS_PPU_FX192_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013824UL)
#define CYREG_PERI_MS_PPU_FX192_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013830UL)
#define CYREG_PERI_MS_PPU_FX192_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013834UL)
#define CYREG_PERI_MS_PPU_FX192_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013838UL)
#define CYREG_PERI_MS_PPU_FX192_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001383CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX193)
  */
#define CYREG_PERI_MS_PPU_FX193_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013840UL)
#define CYREG_PERI_MS_PPU_FX193_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013844UL)
#define CYREG_PERI_MS_PPU_FX193_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013850UL)
#define CYREG_PERI_MS_PPU_FX193_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013854UL)
#define CYREG_PERI_MS_PPU_FX193_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013858UL)
#define CYREG_PERI_MS_PPU_FX193_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001385CUL)
#define CYREG_PERI_MS_PPU_FX193_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013860UL)
#define CYREG_PERI_MS_PPU_FX193_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013864UL)
#define CYREG_PERI_MS_PPU_FX193_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013870UL)
#define CYREG_PERI_MS_PPU_FX193_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013874UL)
#define CYREG_PERI_MS_PPU_FX193_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013878UL)
#define CYREG_PERI_MS_PPU_FX193_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001387CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX194)
  */
#define CYREG_PERI_MS_PPU_FX194_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013880UL)
#define CYREG_PERI_MS_PPU_FX194_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013884UL)
#define CYREG_PERI_MS_PPU_FX194_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013890UL)
#define CYREG_PERI_MS_PPU_FX194_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013894UL)
#define CYREG_PERI_MS_PPU_FX194_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013898UL)
#define CYREG_PERI_MS_PPU_FX194_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001389CUL)
#define CYREG_PERI_MS_PPU_FX194_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400138A0UL)
#define CYREG_PERI_MS_PPU_FX194_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400138A4UL)
#define CYREG_PERI_MS_PPU_FX194_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400138B0UL)
#define CYREG_PERI_MS_PPU_FX194_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400138B4UL)
#define CYREG_PERI_MS_PPU_FX194_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400138B8UL)
#define CYREG_PERI_MS_PPU_FX194_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400138BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX195)
  */
#define CYREG_PERI_MS_PPU_FX195_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400138C0UL)
#define CYREG_PERI_MS_PPU_FX195_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400138C4UL)
#define CYREG_PERI_MS_PPU_FX195_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400138D0UL)
#define CYREG_PERI_MS_PPU_FX195_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400138D4UL)
#define CYREG_PERI_MS_PPU_FX195_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400138D8UL)
#define CYREG_PERI_MS_PPU_FX195_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400138DCUL)
#define CYREG_PERI_MS_PPU_FX195_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400138E0UL)
#define CYREG_PERI_MS_PPU_FX195_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400138E4UL)
#define CYREG_PERI_MS_PPU_FX195_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400138F0UL)
#define CYREG_PERI_MS_PPU_FX195_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400138F4UL)
#define CYREG_PERI_MS_PPU_FX195_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400138F8UL)
#define CYREG_PERI_MS_PPU_FX195_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400138FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX196)
  */
#define CYREG_PERI_MS_PPU_FX196_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013900UL)
#define CYREG_PERI_MS_PPU_FX196_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013904UL)
#define CYREG_PERI_MS_PPU_FX196_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013910UL)
#define CYREG_PERI_MS_PPU_FX196_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013914UL)
#define CYREG_PERI_MS_PPU_FX196_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013918UL)
#define CYREG_PERI_MS_PPU_FX196_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001391CUL)
#define CYREG_PERI_MS_PPU_FX196_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013920UL)
#define CYREG_PERI_MS_PPU_FX196_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013924UL)
#define CYREG_PERI_MS_PPU_FX196_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013930UL)
#define CYREG_PERI_MS_PPU_FX196_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013934UL)
#define CYREG_PERI_MS_PPU_FX196_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013938UL)
#define CYREG_PERI_MS_PPU_FX196_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001393CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX197)
  */
#define CYREG_PERI_MS_PPU_FX197_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013940UL)
#define CYREG_PERI_MS_PPU_FX197_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013944UL)
#define CYREG_PERI_MS_PPU_FX197_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013950UL)
#define CYREG_PERI_MS_PPU_FX197_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013954UL)
#define CYREG_PERI_MS_PPU_FX197_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013958UL)
#define CYREG_PERI_MS_PPU_FX197_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001395CUL)
#define CYREG_PERI_MS_PPU_FX197_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013960UL)
#define CYREG_PERI_MS_PPU_FX197_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013964UL)
#define CYREG_PERI_MS_PPU_FX197_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013970UL)
#define CYREG_PERI_MS_PPU_FX197_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013974UL)
#define CYREG_PERI_MS_PPU_FX197_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013978UL)
#define CYREG_PERI_MS_PPU_FX197_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001397CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX198)
  */
#define CYREG_PERI_MS_PPU_FX198_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013980UL)
#define CYREG_PERI_MS_PPU_FX198_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013984UL)
#define CYREG_PERI_MS_PPU_FX198_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013990UL)
#define CYREG_PERI_MS_PPU_FX198_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013994UL)
#define CYREG_PERI_MS_PPU_FX198_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013998UL)
#define CYREG_PERI_MS_PPU_FX198_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001399CUL)
#define CYREG_PERI_MS_PPU_FX198_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400139A0UL)
#define CYREG_PERI_MS_PPU_FX198_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400139A4UL)
#define CYREG_PERI_MS_PPU_FX198_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400139B0UL)
#define CYREG_PERI_MS_PPU_FX198_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400139B4UL)
#define CYREG_PERI_MS_PPU_FX198_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400139B8UL)
#define CYREG_PERI_MS_PPU_FX198_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400139BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX199)
  */
#define CYREG_PERI_MS_PPU_FX199_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400139C0UL)
#define CYREG_PERI_MS_PPU_FX199_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400139C4UL)
#define CYREG_PERI_MS_PPU_FX199_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400139D0UL)
#define CYREG_PERI_MS_PPU_FX199_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400139D4UL)
#define CYREG_PERI_MS_PPU_FX199_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400139D8UL)
#define CYREG_PERI_MS_PPU_FX199_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400139DCUL)
#define CYREG_PERI_MS_PPU_FX199_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400139E0UL)
#define CYREG_PERI_MS_PPU_FX199_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400139E4UL)
#define CYREG_PERI_MS_PPU_FX199_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400139F0UL)
#define CYREG_PERI_MS_PPU_FX199_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400139F4UL)
#define CYREG_PERI_MS_PPU_FX199_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400139F8UL)
#define CYREG_PERI_MS_PPU_FX199_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400139FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX200)
  */
#define CYREG_PERI_MS_PPU_FX200_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013A00UL)
#define CYREG_PERI_MS_PPU_FX200_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013A04UL)
#define CYREG_PERI_MS_PPU_FX200_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013A10UL)
#define CYREG_PERI_MS_PPU_FX200_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013A14UL)
#define CYREG_PERI_MS_PPU_FX200_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013A18UL)
#define CYREG_PERI_MS_PPU_FX200_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013A1CUL)
#define CYREG_PERI_MS_PPU_FX200_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013A20UL)
#define CYREG_PERI_MS_PPU_FX200_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013A24UL)
#define CYREG_PERI_MS_PPU_FX200_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013A30UL)
#define CYREG_PERI_MS_PPU_FX200_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013A34UL)
#define CYREG_PERI_MS_PPU_FX200_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013A38UL)
#define CYREG_PERI_MS_PPU_FX200_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX201)
  */
#define CYREG_PERI_MS_PPU_FX201_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013A40UL)
#define CYREG_PERI_MS_PPU_FX201_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013A44UL)
#define CYREG_PERI_MS_PPU_FX201_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013A50UL)
#define CYREG_PERI_MS_PPU_FX201_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013A54UL)
#define CYREG_PERI_MS_PPU_FX201_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013A58UL)
#define CYREG_PERI_MS_PPU_FX201_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013A5CUL)
#define CYREG_PERI_MS_PPU_FX201_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013A60UL)
#define CYREG_PERI_MS_PPU_FX201_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013A64UL)
#define CYREG_PERI_MS_PPU_FX201_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013A70UL)
#define CYREG_PERI_MS_PPU_FX201_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013A74UL)
#define CYREG_PERI_MS_PPU_FX201_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013A78UL)
#define CYREG_PERI_MS_PPU_FX201_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX202)
  */
#define CYREG_PERI_MS_PPU_FX202_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013A80UL)
#define CYREG_PERI_MS_PPU_FX202_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013A84UL)
#define CYREG_PERI_MS_PPU_FX202_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013A90UL)
#define CYREG_PERI_MS_PPU_FX202_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013A94UL)
#define CYREG_PERI_MS_PPU_FX202_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013A98UL)
#define CYREG_PERI_MS_PPU_FX202_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013A9CUL)
#define CYREG_PERI_MS_PPU_FX202_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013AA0UL)
#define CYREG_PERI_MS_PPU_FX202_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013AA4UL)
#define CYREG_PERI_MS_PPU_FX202_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013AB0UL)
#define CYREG_PERI_MS_PPU_FX202_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013AB4UL)
#define CYREG_PERI_MS_PPU_FX202_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013AB8UL)
#define CYREG_PERI_MS_PPU_FX202_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX203)
  */
#define CYREG_PERI_MS_PPU_FX203_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013AC0UL)
#define CYREG_PERI_MS_PPU_FX203_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013AC4UL)
#define CYREG_PERI_MS_PPU_FX203_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013AD0UL)
#define CYREG_PERI_MS_PPU_FX203_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013AD4UL)
#define CYREG_PERI_MS_PPU_FX203_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013AD8UL)
#define CYREG_PERI_MS_PPU_FX203_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013ADCUL)
#define CYREG_PERI_MS_PPU_FX203_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013AE0UL)
#define CYREG_PERI_MS_PPU_FX203_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013AE4UL)
#define CYREG_PERI_MS_PPU_FX203_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013AF0UL)
#define CYREG_PERI_MS_PPU_FX203_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013AF4UL)
#define CYREG_PERI_MS_PPU_FX203_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013AF8UL)
#define CYREG_PERI_MS_PPU_FX203_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX204)
  */
#define CYREG_PERI_MS_PPU_FX204_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013B00UL)
#define CYREG_PERI_MS_PPU_FX204_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013B04UL)
#define CYREG_PERI_MS_PPU_FX204_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013B10UL)
#define CYREG_PERI_MS_PPU_FX204_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013B14UL)
#define CYREG_PERI_MS_PPU_FX204_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013B18UL)
#define CYREG_PERI_MS_PPU_FX204_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013B1CUL)
#define CYREG_PERI_MS_PPU_FX204_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013B20UL)
#define CYREG_PERI_MS_PPU_FX204_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013B24UL)
#define CYREG_PERI_MS_PPU_FX204_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013B30UL)
#define CYREG_PERI_MS_PPU_FX204_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013B34UL)
#define CYREG_PERI_MS_PPU_FX204_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013B38UL)
#define CYREG_PERI_MS_PPU_FX204_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX205)
  */
#define CYREG_PERI_MS_PPU_FX205_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013B40UL)
#define CYREG_PERI_MS_PPU_FX205_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013B44UL)
#define CYREG_PERI_MS_PPU_FX205_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013B50UL)
#define CYREG_PERI_MS_PPU_FX205_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013B54UL)
#define CYREG_PERI_MS_PPU_FX205_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013B58UL)
#define CYREG_PERI_MS_PPU_FX205_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013B5CUL)
#define CYREG_PERI_MS_PPU_FX205_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013B60UL)
#define CYREG_PERI_MS_PPU_FX205_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013B64UL)
#define CYREG_PERI_MS_PPU_FX205_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013B70UL)
#define CYREG_PERI_MS_PPU_FX205_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013B74UL)
#define CYREG_PERI_MS_PPU_FX205_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013B78UL)
#define CYREG_PERI_MS_PPU_FX205_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX206)
  */
#define CYREG_PERI_MS_PPU_FX206_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013B80UL)
#define CYREG_PERI_MS_PPU_FX206_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013B84UL)
#define CYREG_PERI_MS_PPU_FX206_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013B90UL)
#define CYREG_PERI_MS_PPU_FX206_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013B94UL)
#define CYREG_PERI_MS_PPU_FX206_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013B98UL)
#define CYREG_PERI_MS_PPU_FX206_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013B9CUL)
#define CYREG_PERI_MS_PPU_FX206_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013BA0UL)
#define CYREG_PERI_MS_PPU_FX206_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013BA4UL)
#define CYREG_PERI_MS_PPU_FX206_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013BB0UL)
#define CYREG_PERI_MS_PPU_FX206_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013BB4UL)
#define CYREG_PERI_MS_PPU_FX206_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013BB8UL)
#define CYREG_PERI_MS_PPU_FX206_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX207)
  */
#define CYREG_PERI_MS_PPU_FX207_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013BC0UL)
#define CYREG_PERI_MS_PPU_FX207_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013BC4UL)
#define CYREG_PERI_MS_PPU_FX207_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013BD0UL)
#define CYREG_PERI_MS_PPU_FX207_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013BD4UL)
#define CYREG_PERI_MS_PPU_FX207_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013BD8UL)
#define CYREG_PERI_MS_PPU_FX207_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013BDCUL)
#define CYREG_PERI_MS_PPU_FX207_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013BE0UL)
#define CYREG_PERI_MS_PPU_FX207_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013BE4UL)
#define CYREG_PERI_MS_PPU_FX207_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013BF0UL)
#define CYREG_PERI_MS_PPU_FX207_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013BF4UL)
#define CYREG_PERI_MS_PPU_FX207_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013BF8UL)
#define CYREG_PERI_MS_PPU_FX207_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX208)
  */
#define CYREG_PERI_MS_PPU_FX208_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013C00UL)
#define CYREG_PERI_MS_PPU_FX208_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013C04UL)
#define CYREG_PERI_MS_PPU_FX208_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013C10UL)
#define CYREG_PERI_MS_PPU_FX208_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013C14UL)
#define CYREG_PERI_MS_PPU_FX208_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013C18UL)
#define CYREG_PERI_MS_PPU_FX208_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013C1CUL)
#define CYREG_PERI_MS_PPU_FX208_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013C20UL)
#define CYREG_PERI_MS_PPU_FX208_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013C24UL)
#define CYREG_PERI_MS_PPU_FX208_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013C30UL)
#define CYREG_PERI_MS_PPU_FX208_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013C34UL)
#define CYREG_PERI_MS_PPU_FX208_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013C38UL)
#define CYREG_PERI_MS_PPU_FX208_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX209)
  */
#define CYREG_PERI_MS_PPU_FX209_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013C40UL)
#define CYREG_PERI_MS_PPU_FX209_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013C44UL)
#define CYREG_PERI_MS_PPU_FX209_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013C50UL)
#define CYREG_PERI_MS_PPU_FX209_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013C54UL)
#define CYREG_PERI_MS_PPU_FX209_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013C58UL)
#define CYREG_PERI_MS_PPU_FX209_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013C5CUL)
#define CYREG_PERI_MS_PPU_FX209_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013C60UL)
#define CYREG_PERI_MS_PPU_FX209_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013C64UL)
#define CYREG_PERI_MS_PPU_FX209_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013C70UL)
#define CYREG_PERI_MS_PPU_FX209_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013C74UL)
#define CYREG_PERI_MS_PPU_FX209_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013C78UL)
#define CYREG_PERI_MS_PPU_FX209_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX210)
  */
#define CYREG_PERI_MS_PPU_FX210_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013C80UL)
#define CYREG_PERI_MS_PPU_FX210_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013C84UL)
#define CYREG_PERI_MS_PPU_FX210_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013C90UL)
#define CYREG_PERI_MS_PPU_FX210_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013C94UL)
#define CYREG_PERI_MS_PPU_FX210_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013C98UL)
#define CYREG_PERI_MS_PPU_FX210_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013C9CUL)
#define CYREG_PERI_MS_PPU_FX210_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013CA0UL)
#define CYREG_PERI_MS_PPU_FX210_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013CA4UL)
#define CYREG_PERI_MS_PPU_FX210_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013CB0UL)
#define CYREG_PERI_MS_PPU_FX210_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013CB4UL)
#define CYREG_PERI_MS_PPU_FX210_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013CB8UL)
#define CYREG_PERI_MS_PPU_FX210_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX211)
  */
#define CYREG_PERI_MS_PPU_FX211_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013CC0UL)
#define CYREG_PERI_MS_PPU_FX211_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013CC4UL)
#define CYREG_PERI_MS_PPU_FX211_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013CD0UL)
#define CYREG_PERI_MS_PPU_FX211_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013CD4UL)
#define CYREG_PERI_MS_PPU_FX211_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013CD8UL)
#define CYREG_PERI_MS_PPU_FX211_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013CDCUL)
#define CYREG_PERI_MS_PPU_FX211_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013CE0UL)
#define CYREG_PERI_MS_PPU_FX211_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013CE4UL)
#define CYREG_PERI_MS_PPU_FX211_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013CF0UL)
#define CYREG_PERI_MS_PPU_FX211_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013CF4UL)
#define CYREG_PERI_MS_PPU_FX211_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013CF8UL)
#define CYREG_PERI_MS_PPU_FX211_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX212)
  */
#define CYREG_PERI_MS_PPU_FX212_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013D00UL)
#define CYREG_PERI_MS_PPU_FX212_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013D04UL)
#define CYREG_PERI_MS_PPU_FX212_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013D10UL)
#define CYREG_PERI_MS_PPU_FX212_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013D14UL)
#define CYREG_PERI_MS_PPU_FX212_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013D18UL)
#define CYREG_PERI_MS_PPU_FX212_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013D1CUL)
#define CYREG_PERI_MS_PPU_FX212_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013D20UL)
#define CYREG_PERI_MS_PPU_FX212_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013D24UL)
#define CYREG_PERI_MS_PPU_FX212_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013D30UL)
#define CYREG_PERI_MS_PPU_FX212_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013D34UL)
#define CYREG_PERI_MS_PPU_FX212_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013D38UL)
#define CYREG_PERI_MS_PPU_FX212_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX213)
  */
#define CYREG_PERI_MS_PPU_FX213_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013D40UL)
#define CYREG_PERI_MS_PPU_FX213_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013D44UL)
#define CYREG_PERI_MS_PPU_FX213_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013D50UL)
#define CYREG_PERI_MS_PPU_FX213_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013D54UL)
#define CYREG_PERI_MS_PPU_FX213_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013D58UL)
#define CYREG_PERI_MS_PPU_FX213_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013D5CUL)
#define CYREG_PERI_MS_PPU_FX213_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013D60UL)
#define CYREG_PERI_MS_PPU_FX213_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013D64UL)
#define CYREG_PERI_MS_PPU_FX213_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013D70UL)
#define CYREG_PERI_MS_PPU_FX213_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013D74UL)
#define CYREG_PERI_MS_PPU_FX213_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013D78UL)
#define CYREG_PERI_MS_PPU_FX213_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX214)
  */
#define CYREG_PERI_MS_PPU_FX214_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013D80UL)
#define CYREG_PERI_MS_PPU_FX214_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013D84UL)
#define CYREG_PERI_MS_PPU_FX214_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013D90UL)
#define CYREG_PERI_MS_PPU_FX214_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013D94UL)
#define CYREG_PERI_MS_PPU_FX214_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013D98UL)
#define CYREG_PERI_MS_PPU_FX214_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013D9CUL)
#define CYREG_PERI_MS_PPU_FX214_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013DA0UL)
#define CYREG_PERI_MS_PPU_FX214_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013DA4UL)
#define CYREG_PERI_MS_PPU_FX214_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013DB0UL)
#define CYREG_PERI_MS_PPU_FX214_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013DB4UL)
#define CYREG_PERI_MS_PPU_FX214_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013DB8UL)
#define CYREG_PERI_MS_PPU_FX214_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX215)
  */
#define CYREG_PERI_MS_PPU_FX215_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013DC0UL)
#define CYREG_PERI_MS_PPU_FX215_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013DC4UL)
#define CYREG_PERI_MS_PPU_FX215_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013DD0UL)
#define CYREG_PERI_MS_PPU_FX215_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013DD4UL)
#define CYREG_PERI_MS_PPU_FX215_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013DD8UL)
#define CYREG_PERI_MS_PPU_FX215_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013DDCUL)
#define CYREG_PERI_MS_PPU_FX215_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013DE0UL)
#define CYREG_PERI_MS_PPU_FX215_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013DE4UL)
#define CYREG_PERI_MS_PPU_FX215_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013DF0UL)
#define CYREG_PERI_MS_PPU_FX215_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013DF4UL)
#define CYREG_PERI_MS_PPU_FX215_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013DF8UL)
#define CYREG_PERI_MS_PPU_FX215_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX216)
  */
#define CYREG_PERI_MS_PPU_FX216_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013E00UL)
#define CYREG_PERI_MS_PPU_FX216_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013E04UL)
#define CYREG_PERI_MS_PPU_FX216_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013E10UL)
#define CYREG_PERI_MS_PPU_FX216_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013E14UL)
#define CYREG_PERI_MS_PPU_FX216_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013E18UL)
#define CYREG_PERI_MS_PPU_FX216_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013E1CUL)
#define CYREG_PERI_MS_PPU_FX216_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013E20UL)
#define CYREG_PERI_MS_PPU_FX216_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013E24UL)
#define CYREG_PERI_MS_PPU_FX216_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013E30UL)
#define CYREG_PERI_MS_PPU_FX216_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013E34UL)
#define CYREG_PERI_MS_PPU_FX216_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013E38UL)
#define CYREG_PERI_MS_PPU_FX216_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX217)
  */
#define CYREG_PERI_MS_PPU_FX217_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013E40UL)
#define CYREG_PERI_MS_PPU_FX217_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013E44UL)
#define CYREG_PERI_MS_PPU_FX217_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013E50UL)
#define CYREG_PERI_MS_PPU_FX217_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013E54UL)
#define CYREG_PERI_MS_PPU_FX217_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013E58UL)
#define CYREG_PERI_MS_PPU_FX217_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013E5CUL)
#define CYREG_PERI_MS_PPU_FX217_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013E60UL)
#define CYREG_PERI_MS_PPU_FX217_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013E64UL)
#define CYREG_PERI_MS_PPU_FX217_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013E70UL)
#define CYREG_PERI_MS_PPU_FX217_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013E74UL)
#define CYREG_PERI_MS_PPU_FX217_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013E78UL)
#define CYREG_PERI_MS_PPU_FX217_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX218)
  */
#define CYREG_PERI_MS_PPU_FX218_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013E80UL)
#define CYREG_PERI_MS_PPU_FX218_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013E84UL)
#define CYREG_PERI_MS_PPU_FX218_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013E90UL)
#define CYREG_PERI_MS_PPU_FX218_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013E94UL)
#define CYREG_PERI_MS_PPU_FX218_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013E98UL)
#define CYREG_PERI_MS_PPU_FX218_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013E9CUL)
#define CYREG_PERI_MS_PPU_FX218_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013EA0UL)
#define CYREG_PERI_MS_PPU_FX218_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013EA4UL)
#define CYREG_PERI_MS_PPU_FX218_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013EB0UL)
#define CYREG_PERI_MS_PPU_FX218_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013EB4UL)
#define CYREG_PERI_MS_PPU_FX218_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013EB8UL)
#define CYREG_PERI_MS_PPU_FX218_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX219)
  */
#define CYREG_PERI_MS_PPU_FX219_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013EC0UL)
#define CYREG_PERI_MS_PPU_FX219_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013EC4UL)
#define CYREG_PERI_MS_PPU_FX219_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013ED0UL)
#define CYREG_PERI_MS_PPU_FX219_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013ED4UL)
#define CYREG_PERI_MS_PPU_FX219_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013ED8UL)
#define CYREG_PERI_MS_PPU_FX219_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013EDCUL)
#define CYREG_PERI_MS_PPU_FX219_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013EE0UL)
#define CYREG_PERI_MS_PPU_FX219_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013EE4UL)
#define CYREG_PERI_MS_PPU_FX219_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013EF0UL)
#define CYREG_PERI_MS_PPU_FX219_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013EF4UL)
#define CYREG_PERI_MS_PPU_FX219_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013EF8UL)
#define CYREG_PERI_MS_PPU_FX219_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX220)
  */
#define CYREG_PERI_MS_PPU_FX220_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013F00UL)
#define CYREG_PERI_MS_PPU_FX220_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013F04UL)
#define CYREG_PERI_MS_PPU_FX220_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013F10UL)
#define CYREG_PERI_MS_PPU_FX220_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013F14UL)
#define CYREG_PERI_MS_PPU_FX220_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013F18UL)
#define CYREG_PERI_MS_PPU_FX220_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013F1CUL)
#define CYREG_PERI_MS_PPU_FX220_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013F20UL)
#define CYREG_PERI_MS_PPU_FX220_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013F24UL)
#define CYREG_PERI_MS_PPU_FX220_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013F30UL)
#define CYREG_PERI_MS_PPU_FX220_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013F34UL)
#define CYREG_PERI_MS_PPU_FX220_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013F38UL)
#define CYREG_PERI_MS_PPU_FX220_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX221)
  */
#define CYREG_PERI_MS_PPU_FX221_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013F40UL)
#define CYREG_PERI_MS_PPU_FX221_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013F44UL)
#define CYREG_PERI_MS_PPU_FX221_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013F50UL)
#define CYREG_PERI_MS_PPU_FX221_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013F54UL)
#define CYREG_PERI_MS_PPU_FX221_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013F58UL)
#define CYREG_PERI_MS_PPU_FX221_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013F5CUL)
#define CYREG_PERI_MS_PPU_FX221_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013F60UL)
#define CYREG_PERI_MS_PPU_FX221_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013F64UL)
#define CYREG_PERI_MS_PPU_FX221_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013F70UL)
#define CYREG_PERI_MS_PPU_FX221_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013F74UL)
#define CYREG_PERI_MS_PPU_FX221_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013F78UL)
#define CYREG_PERI_MS_PPU_FX221_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX222)
  */
#define CYREG_PERI_MS_PPU_FX222_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013F80UL)
#define CYREG_PERI_MS_PPU_FX222_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013F84UL)
#define CYREG_PERI_MS_PPU_FX222_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013F90UL)
#define CYREG_PERI_MS_PPU_FX222_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013F94UL)
#define CYREG_PERI_MS_PPU_FX222_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013F98UL)
#define CYREG_PERI_MS_PPU_FX222_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013F9CUL)
#define CYREG_PERI_MS_PPU_FX222_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013FA0UL)
#define CYREG_PERI_MS_PPU_FX222_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013FA4UL)
#define CYREG_PERI_MS_PPU_FX222_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013FB0UL)
#define CYREG_PERI_MS_PPU_FX222_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013FB4UL)
#define CYREG_PERI_MS_PPU_FX222_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013FB8UL)
#define CYREG_PERI_MS_PPU_FX222_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX223)
  */
#define CYREG_PERI_MS_PPU_FX223_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40013FC0UL)
#define CYREG_PERI_MS_PPU_FX223_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40013FC4UL)
#define CYREG_PERI_MS_PPU_FX223_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40013FD0UL)
#define CYREG_PERI_MS_PPU_FX223_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40013FD4UL)
#define CYREG_PERI_MS_PPU_FX223_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40013FD8UL)
#define CYREG_PERI_MS_PPU_FX223_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40013FDCUL)
#define CYREG_PERI_MS_PPU_FX223_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40013FE0UL)
#define CYREG_PERI_MS_PPU_FX223_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40013FE4UL)
#define CYREG_PERI_MS_PPU_FX223_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40013FF0UL)
#define CYREG_PERI_MS_PPU_FX223_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40013FF4UL)
#define CYREG_PERI_MS_PPU_FX223_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40013FF8UL)
#define CYREG_PERI_MS_PPU_FX223_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40013FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX224)
  */
#define CYREG_PERI_MS_PPU_FX224_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014000UL)
#define CYREG_PERI_MS_PPU_FX224_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014004UL)
#define CYREG_PERI_MS_PPU_FX224_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014010UL)
#define CYREG_PERI_MS_PPU_FX224_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014014UL)
#define CYREG_PERI_MS_PPU_FX224_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014018UL)
#define CYREG_PERI_MS_PPU_FX224_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001401CUL)
#define CYREG_PERI_MS_PPU_FX224_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014020UL)
#define CYREG_PERI_MS_PPU_FX224_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014024UL)
#define CYREG_PERI_MS_PPU_FX224_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014030UL)
#define CYREG_PERI_MS_PPU_FX224_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014034UL)
#define CYREG_PERI_MS_PPU_FX224_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014038UL)
#define CYREG_PERI_MS_PPU_FX224_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001403CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX225)
  */
#define CYREG_PERI_MS_PPU_FX225_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014040UL)
#define CYREG_PERI_MS_PPU_FX225_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014044UL)
#define CYREG_PERI_MS_PPU_FX225_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014050UL)
#define CYREG_PERI_MS_PPU_FX225_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014054UL)
#define CYREG_PERI_MS_PPU_FX225_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014058UL)
#define CYREG_PERI_MS_PPU_FX225_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001405CUL)
#define CYREG_PERI_MS_PPU_FX225_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014060UL)
#define CYREG_PERI_MS_PPU_FX225_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014064UL)
#define CYREG_PERI_MS_PPU_FX225_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014070UL)
#define CYREG_PERI_MS_PPU_FX225_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014074UL)
#define CYREG_PERI_MS_PPU_FX225_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014078UL)
#define CYREG_PERI_MS_PPU_FX225_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001407CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX226)
  */
#define CYREG_PERI_MS_PPU_FX226_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014080UL)
#define CYREG_PERI_MS_PPU_FX226_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014084UL)
#define CYREG_PERI_MS_PPU_FX226_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014090UL)
#define CYREG_PERI_MS_PPU_FX226_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014094UL)
#define CYREG_PERI_MS_PPU_FX226_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014098UL)
#define CYREG_PERI_MS_PPU_FX226_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001409CUL)
#define CYREG_PERI_MS_PPU_FX226_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400140A0UL)
#define CYREG_PERI_MS_PPU_FX226_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400140A4UL)
#define CYREG_PERI_MS_PPU_FX226_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400140B0UL)
#define CYREG_PERI_MS_PPU_FX226_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400140B4UL)
#define CYREG_PERI_MS_PPU_FX226_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400140B8UL)
#define CYREG_PERI_MS_PPU_FX226_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400140BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX227)
  */
#define CYREG_PERI_MS_PPU_FX227_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400140C0UL)
#define CYREG_PERI_MS_PPU_FX227_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400140C4UL)
#define CYREG_PERI_MS_PPU_FX227_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400140D0UL)
#define CYREG_PERI_MS_PPU_FX227_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400140D4UL)
#define CYREG_PERI_MS_PPU_FX227_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400140D8UL)
#define CYREG_PERI_MS_PPU_FX227_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400140DCUL)
#define CYREG_PERI_MS_PPU_FX227_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400140E0UL)
#define CYREG_PERI_MS_PPU_FX227_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400140E4UL)
#define CYREG_PERI_MS_PPU_FX227_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400140F0UL)
#define CYREG_PERI_MS_PPU_FX227_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400140F4UL)
#define CYREG_PERI_MS_PPU_FX227_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400140F8UL)
#define CYREG_PERI_MS_PPU_FX227_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400140FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX228)
  */
#define CYREG_PERI_MS_PPU_FX228_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014100UL)
#define CYREG_PERI_MS_PPU_FX228_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014104UL)
#define CYREG_PERI_MS_PPU_FX228_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014110UL)
#define CYREG_PERI_MS_PPU_FX228_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014114UL)
#define CYREG_PERI_MS_PPU_FX228_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014118UL)
#define CYREG_PERI_MS_PPU_FX228_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001411CUL)
#define CYREG_PERI_MS_PPU_FX228_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014120UL)
#define CYREG_PERI_MS_PPU_FX228_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014124UL)
#define CYREG_PERI_MS_PPU_FX228_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014130UL)
#define CYREG_PERI_MS_PPU_FX228_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014134UL)
#define CYREG_PERI_MS_PPU_FX228_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014138UL)
#define CYREG_PERI_MS_PPU_FX228_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001413CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX229)
  */
#define CYREG_PERI_MS_PPU_FX229_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014140UL)
#define CYREG_PERI_MS_PPU_FX229_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014144UL)
#define CYREG_PERI_MS_PPU_FX229_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014150UL)
#define CYREG_PERI_MS_PPU_FX229_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014154UL)
#define CYREG_PERI_MS_PPU_FX229_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014158UL)
#define CYREG_PERI_MS_PPU_FX229_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001415CUL)
#define CYREG_PERI_MS_PPU_FX229_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014160UL)
#define CYREG_PERI_MS_PPU_FX229_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014164UL)
#define CYREG_PERI_MS_PPU_FX229_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014170UL)
#define CYREG_PERI_MS_PPU_FX229_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014174UL)
#define CYREG_PERI_MS_PPU_FX229_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014178UL)
#define CYREG_PERI_MS_PPU_FX229_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001417CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX230)
  */
#define CYREG_PERI_MS_PPU_FX230_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014180UL)
#define CYREG_PERI_MS_PPU_FX230_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014184UL)
#define CYREG_PERI_MS_PPU_FX230_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014190UL)
#define CYREG_PERI_MS_PPU_FX230_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014194UL)
#define CYREG_PERI_MS_PPU_FX230_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014198UL)
#define CYREG_PERI_MS_PPU_FX230_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001419CUL)
#define CYREG_PERI_MS_PPU_FX230_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400141A0UL)
#define CYREG_PERI_MS_PPU_FX230_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400141A4UL)
#define CYREG_PERI_MS_PPU_FX230_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400141B0UL)
#define CYREG_PERI_MS_PPU_FX230_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400141B4UL)
#define CYREG_PERI_MS_PPU_FX230_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400141B8UL)
#define CYREG_PERI_MS_PPU_FX230_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400141BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX231)
  */
#define CYREG_PERI_MS_PPU_FX231_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400141C0UL)
#define CYREG_PERI_MS_PPU_FX231_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400141C4UL)
#define CYREG_PERI_MS_PPU_FX231_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400141D0UL)
#define CYREG_PERI_MS_PPU_FX231_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400141D4UL)
#define CYREG_PERI_MS_PPU_FX231_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400141D8UL)
#define CYREG_PERI_MS_PPU_FX231_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400141DCUL)
#define CYREG_PERI_MS_PPU_FX231_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400141E0UL)
#define CYREG_PERI_MS_PPU_FX231_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400141E4UL)
#define CYREG_PERI_MS_PPU_FX231_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400141F0UL)
#define CYREG_PERI_MS_PPU_FX231_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400141F4UL)
#define CYREG_PERI_MS_PPU_FX231_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400141F8UL)
#define CYREG_PERI_MS_PPU_FX231_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400141FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX232)
  */
#define CYREG_PERI_MS_PPU_FX232_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014200UL)
#define CYREG_PERI_MS_PPU_FX232_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014204UL)
#define CYREG_PERI_MS_PPU_FX232_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014210UL)
#define CYREG_PERI_MS_PPU_FX232_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014214UL)
#define CYREG_PERI_MS_PPU_FX232_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014218UL)
#define CYREG_PERI_MS_PPU_FX232_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001421CUL)
#define CYREG_PERI_MS_PPU_FX232_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014220UL)
#define CYREG_PERI_MS_PPU_FX232_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014224UL)
#define CYREG_PERI_MS_PPU_FX232_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014230UL)
#define CYREG_PERI_MS_PPU_FX232_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014234UL)
#define CYREG_PERI_MS_PPU_FX232_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014238UL)
#define CYREG_PERI_MS_PPU_FX232_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001423CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX233)
  */
#define CYREG_PERI_MS_PPU_FX233_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014240UL)
#define CYREG_PERI_MS_PPU_FX233_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014244UL)
#define CYREG_PERI_MS_PPU_FX233_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014250UL)
#define CYREG_PERI_MS_PPU_FX233_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014254UL)
#define CYREG_PERI_MS_PPU_FX233_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014258UL)
#define CYREG_PERI_MS_PPU_FX233_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001425CUL)
#define CYREG_PERI_MS_PPU_FX233_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014260UL)
#define CYREG_PERI_MS_PPU_FX233_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014264UL)
#define CYREG_PERI_MS_PPU_FX233_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014270UL)
#define CYREG_PERI_MS_PPU_FX233_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014274UL)
#define CYREG_PERI_MS_PPU_FX233_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014278UL)
#define CYREG_PERI_MS_PPU_FX233_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001427CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX234)
  */
#define CYREG_PERI_MS_PPU_FX234_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014280UL)
#define CYREG_PERI_MS_PPU_FX234_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014284UL)
#define CYREG_PERI_MS_PPU_FX234_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014290UL)
#define CYREG_PERI_MS_PPU_FX234_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014294UL)
#define CYREG_PERI_MS_PPU_FX234_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014298UL)
#define CYREG_PERI_MS_PPU_FX234_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001429CUL)
#define CYREG_PERI_MS_PPU_FX234_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400142A0UL)
#define CYREG_PERI_MS_PPU_FX234_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400142A4UL)
#define CYREG_PERI_MS_PPU_FX234_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400142B0UL)
#define CYREG_PERI_MS_PPU_FX234_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400142B4UL)
#define CYREG_PERI_MS_PPU_FX234_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400142B8UL)
#define CYREG_PERI_MS_PPU_FX234_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400142BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX235)
  */
#define CYREG_PERI_MS_PPU_FX235_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400142C0UL)
#define CYREG_PERI_MS_PPU_FX235_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400142C4UL)
#define CYREG_PERI_MS_PPU_FX235_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400142D0UL)
#define CYREG_PERI_MS_PPU_FX235_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400142D4UL)
#define CYREG_PERI_MS_PPU_FX235_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400142D8UL)
#define CYREG_PERI_MS_PPU_FX235_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400142DCUL)
#define CYREG_PERI_MS_PPU_FX235_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400142E0UL)
#define CYREG_PERI_MS_PPU_FX235_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400142E4UL)
#define CYREG_PERI_MS_PPU_FX235_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400142F0UL)
#define CYREG_PERI_MS_PPU_FX235_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400142F4UL)
#define CYREG_PERI_MS_PPU_FX235_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400142F8UL)
#define CYREG_PERI_MS_PPU_FX235_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400142FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX236)
  */
#define CYREG_PERI_MS_PPU_FX236_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014300UL)
#define CYREG_PERI_MS_PPU_FX236_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014304UL)
#define CYREG_PERI_MS_PPU_FX236_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014310UL)
#define CYREG_PERI_MS_PPU_FX236_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014314UL)
#define CYREG_PERI_MS_PPU_FX236_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014318UL)
#define CYREG_PERI_MS_PPU_FX236_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001431CUL)
#define CYREG_PERI_MS_PPU_FX236_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014320UL)
#define CYREG_PERI_MS_PPU_FX236_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014324UL)
#define CYREG_PERI_MS_PPU_FX236_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014330UL)
#define CYREG_PERI_MS_PPU_FX236_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014334UL)
#define CYREG_PERI_MS_PPU_FX236_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014338UL)
#define CYREG_PERI_MS_PPU_FX236_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001433CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX237)
  */
#define CYREG_PERI_MS_PPU_FX237_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014340UL)
#define CYREG_PERI_MS_PPU_FX237_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014344UL)
#define CYREG_PERI_MS_PPU_FX237_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014350UL)
#define CYREG_PERI_MS_PPU_FX237_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014354UL)
#define CYREG_PERI_MS_PPU_FX237_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014358UL)
#define CYREG_PERI_MS_PPU_FX237_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001435CUL)
#define CYREG_PERI_MS_PPU_FX237_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014360UL)
#define CYREG_PERI_MS_PPU_FX237_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014364UL)
#define CYREG_PERI_MS_PPU_FX237_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014370UL)
#define CYREG_PERI_MS_PPU_FX237_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014374UL)
#define CYREG_PERI_MS_PPU_FX237_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014378UL)
#define CYREG_PERI_MS_PPU_FX237_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001437CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX238)
  */
#define CYREG_PERI_MS_PPU_FX238_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014380UL)
#define CYREG_PERI_MS_PPU_FX238_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014384UL)
#define CYREG_PERI_MS_PPU_FX238_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014390UL)
#define CYREG_PERI_MS_PPU_FX238_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014394UL)
#define CYREG_PERI_MS_PPU_FX238_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014398UL)
#define CYREG_PERI_MS_PPU_FX238_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001439CUL)
#define CYREG_PERI_MS_PPU_FX238_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400143A0UL)
#define CYREG_PERI_MS_PPU_FX238_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400143A4UL)
#define CYREG_PERI_MS_PPU_FX238_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400143B0UL)
#define CYREG_PERI_MS_PPU_FX238_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400143B4UL)
#define CYREG_PERI_MS_PPU_FX238_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400143B8UL)
#define CYREG_PERI_MS_PPU_FX238_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400143BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX239)
  */
#define CYREG_PERI_MS_PPU_FX239_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400143C0UL)
#define CYREG_PERI_MS_PPU_FX239_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400143C4UL)
#define CYREG_PERI_MS_PPU_FX239_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400143D0UL)
#define CYREG_PERI_MS_PPU_FX239_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400143D4UL)
#define CYREG_PERI_MS_PPU_FX239_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400143D8UL)
#define CYREG_PERI_MS_PPU_FX239_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400143DCUL)
#define CYREG_PERI_MS_PPU_FX239_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400143E0UL)
#define CYREG_PERI_MS_PPU_FX239_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400143E4UL)
#define CYREG_PERI_MS_PPU_FX239_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400143F0UL)
#define CYREG_PERI_MS_PPU_FX239_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400143F4UL)
#define CYREG_PERI_MS_PPU_FX239_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400143F8UL)
#define CYREG_PERI_MS_PPU_FX239_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400143FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX240)
  */
#define CYREG_PERI_MS_PPU_FX240_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014400UL)
#define CYREG_PERI_MS_PPU_FX240_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014404UL)
#define CYREG_PERI_MS_PPU_FX240_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014410UL)
#define CYREG_PERI_MS_PPU_FX240_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014414UL)
#define CYREG_PERI_MS_PPU_FX240_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014418UL)
#define CYREG_PERI_MS_PPU_FX240_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001441CUL)
#define CYREG_PERI_MS_PPU_FX240_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014420UL)
#define CYREG_PERI_MS_PPU_FX240_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014424UL)
#define CYREG_PERI_MS_PPU_FX240_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014430UL)
#define CYREG_PERI_MS_PPU_FX240_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014434UL)
#define CYREG_PERI_MS_PPU_FX240_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014438UL)
#define CYREG_PERI_MS_PPU_FX240_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001443CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX241)
  */
#define CYREG_PERI_MS_PPU_FX241_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014440UL)
#define CYREG_PERI_MS_PPU_FX241_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014444UL)
#define CYREG_PERI_MS_PPU_FX241_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014450UL)
#define CYREG_PERI_MS_PPU_FX241_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014454UL)
#define CYREG_PERI_MS_PPU_FX241_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014458UL)
#define CYREG_PERI_MS_PPU_FX241_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001445CUL)
#define CYREG_PERI_MS_PPU_FX241_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014460UL)
#define CYREG_PERI_MS_PPU_FX241_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014464UL)
#define CYREG_PERI_MS_PPU_FX241_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014470UL)
#define CYREG_PERI_MS_PPU_FX241_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014474UL)
#define CYREG_PERI_MS_PPU_FX241_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014478UL)
#define CYREG_PERI_MS_PPU_FX241_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001447CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX242)
  */
#define CYREG_PERI_MS_PPU_FX242_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014480UL)
#define CYREG_PERI_MS_PPU_FX242_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014484UL)
#define CYREG_PERI_MS_PPU_FX242_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014490UL)
#define CYREG_PERI_MS_PPU_FX242_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014494UL)
#define CYREG_PERI_MS_PPU_FX242_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014498UL)
#define CYREG_PERI_MS_PPU_FX242_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001449CUL)
#define CYREG_PERI_MS_PPU_FX242_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400144A0UL)
#define CYREG_PERI_MS_PPU_FX242_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400144A4UL)
#define CYREG_PERI_MS_PPU_FX242_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400144B0UL)
#define CYREG_PERI_MS_PPU_FX242_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400144B4UL)
#define CYREG_PERI_MS_PPU_FX242_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400144B8UL)
#define CYREG_PERI_MS_PPU_FX242_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400144BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX243)
  */
#define CYREG_PERI_MS_PPU_FX243_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400144C0UL)
#define CYREG_PERI_MS_PPU_FX243_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400144C4UL)
#define CYREG_PERI_MS_PPU_FX243_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400144D0UL)
#define CYREG_PERI_MS_PPU_FX243_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400144D4UL)
#define CYREG_PERI_MS_PPU_FX243_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400144D8UL)
#define CYREG_PERI_MS_PPU_FX243_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400144DCUL)
#define CYREG_PERI_MS_PPU_FX243_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400144E0UL)
#define CYREG_PERI_MS_PPU_FX243_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400144E4UL)
#define CYREG_PERI_MS_PPU_FX243_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400144F0UL)
#define CYREG_PERI_MS_PPU_FX243_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400144F4UL)
#define CYREG_PERI_MS_PPU_FX243_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400144F8UL)
#define CYREG_PERI_MS_PPU_FX243_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400144FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX244)
  */
#define CYREG_PERI_MS_PPU_FX244_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014500UL)
#define CYREG_PERI_MS_PPU_FX244_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014504UL)
#define CYREG_PERI_MS_PPU_FX244_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014510UL)
#define CYREG_PERI_MS_PPU_FX244_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014514UL)
#define CYREG_PERI_MS_PPU_FX244_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014518UL)
#define CYREG_PERI_MS_PPU_FX244_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001451CUL)
#define CYREG_PERI_MS_PPU_FX244_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014520UL)
#define CYREG_PERI_MS_PPU_FX244_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014524UL)
#define CYREG_PERI_MS_PPU_FX244_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014530UL)
#define CYREG_PERI_MS_PPU_FX244_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014534UL)
#define CYREG_PERI_MS_PPU_FX244_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014538UL)
#define CYREG_PERI_MS_PPU_FX244_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001453CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX245)
  */
#define CYREG_PERI_MS_PPU_FX245_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014540UL)
#define CYREG_PERI_MS_PPU_FX245_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014544UL)
#define CYREG_PERI_MS_PPU_FX245_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014550UL)
#define CYREG_PERI_MS_PPU_FX245_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014554UL)
#define CYREG_PERI_MS_PPU_FX245_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014558UL)
#define CYREG_PERI_MS_PPU_FX245_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001455CUL)
#define CYREG_PERI_MS_PPU_FX245_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014560UL)
#define CYREG_PERI_MS_PPU_FX245_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014564UL)
#define CYREG_PERI_MS_PPU_FX245_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014570UL)
#define CYREG_PERI_MS_PPU_FX245_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014574UL)
#define CYREG_PERI_MS_PPU_FX245_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014578UL)
#define CYREG_PERI_MS_PPU_FX245_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001457CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX246)
  */
#define CYREG_PERI_MS_PPU_FX246_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014580UL)
#define CYREG_PERI_MS_PPU_FX246_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014584UL)
#define CYREG_PERI_MS_PPU_FX246_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014590UL)
#define CYREG_PERI_MS_PPU_FX246_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014594UL)
#define CYREG_PERI_MS_PPU_FX246_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014598UL)
#define CYREG_PERI_MS_PPU_FX246_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001459CUL)
#define CYREG_PERI_MS_PPU_FX246_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400145A0UL)
#define CYREG_PERI_MS_PPU_FX246_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400145A4UL)
#define CYREG_PERI_MS_PPU_FX246_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400145B0UL)
#define CYREG_PERI_MS_PPU_FX246_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400145B4UL)
#define CYREG_PERI_MS_PPU_FX246_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400145B8UL)
#define CYREG_PERI_MS_PPU_FX246_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400145BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX247)
  */
#define CYREG_PERI_MS_PPU_FX247_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400145C0UL)
#define CYREG_PERI_MS_PPU_FX247_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400145C4UL)
#define CYREG_PERI_MS_PPU_FX247_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400145D0UL)
#define CYREG_PERI_MS_PPU_FX247_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400145D4UL)
#define CYREG_PERI_MS_PPU_FX247_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400145D8UL)
#define CYREG_PERI_MS_PPU_FX247_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400145DCUL)
#define CYREG_PERI_MS_PPU_FX247_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400145E0UL)
#define CYREG_PERI_MS_PPU_FX247_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400145E4UL)
#define CYREG_PERI_MS_PPU_FX247_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400145F0UL)
#define CYREG_PERI_MS_PPU_FX247_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400145F4UL)
#define CYREG_PERI_MS_PPU_FX247_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400145F8UL)
#define CYREG_PERI_MS_PPU_FX247_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400145FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX248)
  */
#define CYREG_PERI_MS_PPU_FX248_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014600UL)
#define CYREG_PERI_MS_PPU_FX248_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014604UL)
#define CYREG_PERI_MS_PPU_FX248_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014610UL)
#define CYREG_PERI_MS_PPU_FX248_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014614UL)
#define CYREG_PERI_MS_PPU_FX248_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014618UL)
#define CYREG_PERI_MS_PPU_FX248_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001461CUL)
#define CYREG_PERI_MS_PPU_FX248_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014620UL)
#define CYREG_PERI_MS_PPU_FX248_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014624UL)
#define CYREG_PERI_MS_PPU_FX248_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014630UL)
#define CYREG_PERI_MS_PPU_FX248_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014634UL)
#define CYREG_PERI_MS_PPU_FX248_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014638UL)
#define CYREG_PERI_MS_PPU_FX248_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001463CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX249)
  */
#define CYREG_PERI_MS_PPU_FX249_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014640UL)
#define CYREG_PERI_MS_PPU_FX249_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014644UL)
#define CYREG_PERI_MS_PPU_FX249_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014650UL)
#define CYREG_PERI_MS_PPU_FX249_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014654UL)
#define CYREG_PERI_MS_PPU_FX249_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014658UL)
#define CYREG_PERI_MS_PPU_FX249_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001465CUL)
#define CYREG_PERI_MS_PPU_FX249_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014660UL)
#define CYREG_PERI_MS_PPU_FX249_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014664UL)
#define CYREG_PERI_MS_PPU_FX249_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014670UL)
#define CYREG_PERI_MS_PPU_FX249_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014674UL)
#define CYREG_PERI_MS_PPU_FX249_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014678UL)
#define CYREG_PERI_MS_PPU_FX249_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001467CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX250)
  */
#define CYREG_PERI_MS_PPU_FX250_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014680UL)
#define CYREG_PERI_MS_PPU_FX250_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014684UL)
#define CYREG_PERI_MS_PPU_FX250_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014690UL)
#define CYREG_PERI_MS_PPU_FX250_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014694UL)
#define CYREG_PERI_MS_PPU_FX250_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014698UL)
#define CYREG_PERI_MS_PPU_FX250_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001469CUL)
#define CYREG_PERI_MS_PPU_FX250_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400146A0UL)
#define CYREG_PERI_MS_PPU_FX250_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400146A4UL)
#define CYREG_PERI_MS_PPU_FX250_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400146B0UL)
#define CYREG_PERI_MS_PPU_FX250_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400146B4UL)
#define CYREG_PERI_MS_PPU_FX250_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400146B8UL)
#define CYREG_PERI_MS_PPU_FX250_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400146BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX251)
  */
#define CYREG_PERI_MS_PPU_FX251_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400146C0UL)
#define CYREG_PERI_MS_PPU_FX251_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400146C4UL)
#define CYREG_PERI_MS_PPU_FX251_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400146D0UL)
#define CYREG_PERI_MS_PPU_FX251_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400146D4UL)
#define CYREG_PERI_MS_PPU_FX251_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400146D8UL)
#define CYREG_PERI_MS_PPU_FX251_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400146DCUL)
#define CYREG_PERI_MS_PPU_FX251_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400146E0UL)
#define CYREG_PERI_MS_PPU_FX251_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400146E4UL)
#define CYREG_PERI_MS_PPU_FX251_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400146F0UL)
#define CYREG_PERI_MS_PPU_FX251_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400146F4UL)
#define CYREG_PERI_MS_PPU_FX251_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400146F8UL)
#define CYREG_PERI_MS_PPU_FX251_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400146FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX252)
  */
#define CYREG_PERI_MS_PPU_FX252_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014700UL)
#define CYREG_PERI_MS_PPU_FX252_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014704UL)
#define CYREG_PERI_MS_PPU_FX252_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014710UL)
#define CYREG_PERI_MS_PPU_FX252_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014714UL)
#define CYREG_PERI_MS_PPU_FX252_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014718UL)
#define CYREG_PERI_MS_PPU_FX252_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001471CUL)
#define CYREG_PERI_MS_PPU_FX252_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014720UL)
#define CYREG_PERI_MS_PPU_FX252_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014724UL)
#define CYREG_PERI_MS_PPU_FX252_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014730UL)
#define CYREG_PERI_MS_PPU_FX252_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014734UL)
#define CYREG_PERI_MS_PPU_FX252_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014738UL)
#define CYREG_PERI_MS_PPU_FX252_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001473CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX253)
  */
#define CYREG_PERI_MS_PPU_FX253_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014740UL)
#define CYREG_PERI_MS_PPU_FX253_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014744UL)
#define CYREG_PERI_MS_PPU_FX253_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014750UL)
#define CYREG_PERI_MS_PPU_FX253_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014754UL)
#define CYREG_PERI_MS_PPU_FX253_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014758UL)
#define CYREG_PERI_MS_PPU_FX253_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001475CUL)
#define CYREG_PERI_MS_PPU_FX253_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014760UL)
#define CYREG_PERI_MS_PPU_FX253_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014764UL)
#define CYREG_PERI_MS_PPU_FX253_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014770UL)
#define CYREG_PERI_MS_PPU_FX253_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014774UL)
#define CYREG_PERI_MS_PPU_FX253_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014778UL)
#define CYREG_PERI_MS_PPU_FX253_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001477CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX254)
  */
#define CYREG_PERI_MS_PPU_FX254_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014780UL)
#define CYREG_PERI_MS_PPU_FX254_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014784UL)
#define CYREG_PERI_MS_PPU_FX254_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014790UL)
#define CYREG_PERI_MS_PPU_FX254_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014794UL)
#define CYREG_PERI_MS_PPU_FX254_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014798UL)
#define CYREG_PERI_MS_PPU_FX254_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001479CUL)
#define CYREG_PERI_MS_PPU_FX254_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400147A0UL)
#define CYREG_PERI_MS_PPU_FX254_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400147A4UL)
#define CYREG_PERI_MS_PPU_FX254_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400147B0UL)
#define CYREG_PERI_MS_PPU_FX254_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400147B4UL)
#define CYREG_PERI_MS_PPU_FX254_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400147B8UL)
#define CYREG_PERI_MS_PPU_FX254_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400147BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX255)
  */
#define CYREG_PERI_MS_PPU_FX255_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400147C0UL)
#define CYREG_PERI_MS_PPU_FX255_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400147C4UL)
#define CYREG_PERI_MS_PPU_FX255_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400147D0UL)
#define CYREG_PERI_MS_PPU_FX255_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400147D4UL)
#define CYREG_PERI_MS_PPU_FX255_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400147D8UL)
#define CYREG_PERI_MS_PPU_FX255_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400147DCUL)
#define CYREG_PERI_MS_PPU_FX255_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400147E0UL)
#define CYREG_PERI_MS_PPU_FX255_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400147E4UL)
#define CYREG_PERI_MS_PPU_FX255_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400147F0UL)
#define CYREG_PERI_MS_PPU_FX255_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400147F4UL)
#define CYREG_PERI_MS_PPU_FX255_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400147F8UL)
#define CYREG_PERI_MS_PPU_FX255_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400147FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX256)
  */
#define CYREG_PERI_MS_PPU_FX256_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014800UL)
#define CYREG_PERI_MS_PPU_FX256_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014804UL)
#define CYREG_PERI_MS_PPU_FX256_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014810UL)
#define CYREG_PERI_MS_PPU_FX256_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014814UL)
#define CYREG_PERI_MS_PPU_FX256_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014818UL)
#define CYREG_PERI_MS_PPU_FX256_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001481CUL)
#define CYREG_PERI_MS_PPU_FX256_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014820UL)
#define CYREG_PERI_MS_PPU_FX256_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014824UL)
#define CYREG_PERI_MS_PPU_FX256_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014830UL)
#define CYREG_PERI_MS_PPU_FX256_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014834UL)
#define CYREG_PERI_MS_PPU_FX256_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014838UL)
#define CYREG_PERI_MS_PPU_FX256_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001483CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX257)
  */
#define CYREG_PERI_MS_PPU_FX257_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014840UL)
#define CYREG_PERI_MS_PPU_FX257_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014844UL)
#define CYREG_PERI_MS_PPU_FX257_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014850UL)
#define CYREG_PERI_MS_PPU_FX257_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014854UL)
#define CYREG_PERI_MS_PPU_FX257_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014858UL)
#define CYREG_PERI_MS_PPU_FX257_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001485CUL)
#define CYREG_PERI_MS_PPU_FX257_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014860UL)
#define CYREG_PERI_MS_PPU_FX257_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014864UL)
#define CYREG_PERI_MS_PPU_FX257_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014870UL)
#define CYREG_PERI_MS_PPU_FX257_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014874UL)
#define CYREG_PERI_MS_PPU_FX257_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014878UL)
#define CYREG_PERI_MS_PPU_FX257_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001487CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX258)
  */
#define CYREG_PERI_MS_PPU_FX258_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014880UL)
#define CYREG_PERI_MS_PPU_FX258_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014884UL)
#define CYREG_PERI_MS_PPU_FX258_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014890UL)
#define CYREG_PERI_MS_PPU_FX258_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014894UL)
#define CYREG_PERI_MS_PPU_FX258_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014898UL)
#define CYREG_PERI_MS_PPU_FX258_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001489CUL)
#define CYREG_PERI_MS_PPU_FX258_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400148A0UL)
#define CYREG_PERI_MS_PPU_FX258_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400148A4UL)
#define CYREG_PERI_MS_PPU_FX258_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400148B0UL)
#define CYREG_PERI_MS_PPU_FX258_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400148B4UL)
#define CYREG_PERI_MS_PPU_FX258_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400148B8UL)
#define CYREG_PERI_MS_PPU_FX258_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400148BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX259)
  */
#define CYREG_PERI_MS_PPU_FX259_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400148C0UL)
#define CYREG_PERI_MS_PPU_FX259_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400148C4UL)
#define CYREG_PERI_MS_PPU_FX259_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400148D0UL)
#define CYREG_PERI_MS_PPU_FX259_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400148D4UL)
#define CYREG_PERI_MS_PPU_FX259_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400148D8UL)
#define CYREG_PERI_MS_PPU_FX259_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400148DCUL)
#define CYREG_PERI_MS_PPU_FX259_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400148E0UL)
#define CYREG_PERI_MS_PPU_FX259_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400148E4UL)
#define CYREG_PERI_MS_PPU_FX259_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400148F0UL)
#define CYREG_PERI_MS_PPU_FX259_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400148F4UL)
#define CYREG_PERI_MS_PPU_FX259_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400148F8UL)
#define CYREG_PERI_MS_PPU_FX259_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400148FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX260)
  */
#define CYREG_PERI_MS_PPU_FX260_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014900UL)
#define CYREG_PERI_MS_PPU_FX260_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014904UL)
#define CYREG_PERI_MS_PPU_FX260_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014910UL)
#define CYREG_PERI_MS_PPU_FX260_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014914UL)
#define CYREG_PERI_MS_PPU_FX260_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014918UL)
#define CYREG_PERI_MS_PPU_FX260_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001491CUL)
#define CYREG_PERI_MS_PPU_FX260_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014920UL)
#define CYREG_PERI_MS_PPU_FX260_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014924UL)
#define CYREG_PERI_MS_PPU_FX260_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014930UL)
#define CYREG_PERI_MS_PPU_FX260_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014934UL)
#define CYREG_PERI_MS_PPU_FX260_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014938UL)
#define CYREG_PERI_MS_PPU_FX260_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001493CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX261)
  */
#define CYREG_PERI_MS_PPU_FX261_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014940UL)
#define CYREG_PERI_MS_PPU_FX261_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014944UL)
#define CYREG_PERI_MS_PPU_FX261_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014950UL)
#define CYREG_PERI_MS_PPU_FX261_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014954UL)
#define CYREG_PERI_MS_PPU_FX261_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014958UL)
#define CYREG_PERI_MS_PPU_FX261_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001495CUL)
#define CYREG_PERI_MS_PPU_FX261_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014960UL)
#define CYREG_PERI_MS_PPU_FX261_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014964UL)
#define CYREG_PERI_MS_PPU_FX261_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014970UL)
#define CYREG_PERI_MS_PPU_FX261_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014974UL)
#define CYREG_PERI_MS_PPU_FX261_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014978UL)
#define CYREG_PERI_MS_PPU_FX261_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001497CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX262)
  */
#define CYREG_PERI_MS_PPU_FX262_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014980UL)
#define CYREG_PERI_MS_PPU_FX262_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014984UL)
#define CYREG_PERI_MS_PPU_FX262_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014990UL)
#define CYREG_PERI_MS_PPU_FX262_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014994UL)
#define CYREG_PERI_MS_PPU_FX262_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014998UL)
#define CYREG_PERI_MS_PPU_FX262_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001499CUL)
#define CYREG_PERI_MS_PPU_FX262_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400149A0UL)
#define CYREG_PERI_MS_PPU_FX262_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400149A4UL)
#define CYREG_PERI_MS_PPU_FX262_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400149B0UL)
#define CYREG_PERI_MS_PPU_FX262_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400149B4UL)
#define CYREG_PERI_MS_PPU_FX262_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400149B8UL)
#define CYREG_PERI_MS_PPU_FX262_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400149BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX263)
  */
#define CYREG_PERI_MS_PPU_FX263_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400149C0UL)
#define CYREG_PERI_MS_PPU_FX263_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400149C4UL)
#define CYREG_PERI_MS_PPU_FX263_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400149D0UL)
#define CYREG_PERI_MS_PPU_FX263_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400149D4UL)
#define CYREG_PERI_MS_PPU_FX263_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400149D8UL)
#define CYREG_PERI_MS_PPU_FX263_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400149DCUL)
#define CYREG_PERI_MS_PPU_FX263_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400149E0UL)
#define CYREG_PERI_MS_PPU_FX263_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400149E4UL)
#define CYREG_PERI_MS_PPU_FX263_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400149F0UL)
#define CYREG_PERI_MS_PPU_FX263_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400149F4UL)
#define CYREG_PERI_MS_PPU_FX263_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400149F8UL)
#define CYREG_PERI_MS_PPU_FX263_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400149FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX264)
  */
#define CYREG_PERI_MS_PPU_FX264_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014A00UL)
#define CYREG_PERI_MS_PPU_FX264_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014A04UL)
#define CYREG_PERI_MS_PPU_FX264_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014A10UL)
#define CYREG_PERI_MS_PPU_FX264_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014A14UL)
#define CYREG_PERI_MS_PPU_FX264_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014A18UL)
#define CYREG_PERI_MS_PPU_FX264_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014A1CUL)
#define CYREG_PERI_MS_PPU_FX264_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014A20UL)
#define CYREG_PERI_MS_PPU_FX264_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014A24UL)
#define CYREG_PERI_MS_PPU_FX264_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014A30UL)
#define CYREG_PERI_MS_PPU_FX264_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014A34UL)
#define CYREG_PERI_MS_PPU_FX264_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014A38UL)
#define CYREG_PERI_MS_PPU_FX264_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX265)
  */
#define CYREG_PERI_MS_PPU_FX265_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014A40UL)
#define CYREG_PERI_MS_PPU_FX265_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014A44UL)
#define CYREG_PERI_MS_PPU_FX265_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014A50UL)
#define CYREG_PERI_MS_PPU_FX265_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014A54UL)
#define CYREG_PERI_MS_PPU_FX265_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014A58UL)
#define CYREG_PERI_MS_PPU_FX265_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014A5CUL)
#define CYREG_PERI_MS_PPU_FX265_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014A60UL)
#define CYREG_PERI_MS_PPU_FX265_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014A64UL)
#define CYREG_PERI_MS_PPU_FX265_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014A70UL)
#define CYREG_PERI_MS_PPU_FX265_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014A74UL)
#define CYREG_PERI_MS_PPU_FX265_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014A78UL)
#define CYREG_PERI_MS_PPU_FX265_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX266)
  */
#define CYREG_PERI_MS_PPU_FX266_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014A80UL)
#define CYREG_PERI_MS_PPU_FX266_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014A84UL)
#define CYREG_PERI_MS_PPU_FX266_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014A90UL)
#define CYREG_PERI_MS_PPU_FX266_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014A94UL)
#define CYREG_PERI_MS_PPU_FX266_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014A98UL)
#define CYREG_PERI_MS_PPU_FX266_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014A9CUL)
#define CYREG_PERI_MS_PPU_FX266_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014AA0UL)
#define CYREG_PERI_MS_PPU_FX266_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014AA4UL)
#define CYREG_PERI_MS_PPU_FX266_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014AB0UL)
#define CYREG_PERI_MS_PPU_FX266_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014AB4UL)
#define CYREG_PERI_MS_PPU_FX266_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014AB8UL)
#define CYREG_PERI_MS_PPU_FX266_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX267)
  */
#define CYREG_PERI_MS_PPU_FX267_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014AC0UL)
#define CYREG_PERI_MS_PPU_FX267_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014AC4UL)
#define CYREG_PERI_MS_PPU_FX267_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014AD0UL)
#define CYREG_PERI_MS_PPU_FX267_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014AD4UL)
#define CYREG_PERI_MS_PPU_FX267_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014AD8UL)
#define CYREG_PERI_MS_PPU_FX267_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014ADCUL)
#define CYREG_PERI_MS_PPU_FX267_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014AE0UL)
#define CYREG_PERI_MS_PPU_FX267_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014AE4UL)
#define CYREG_PERI_MS_PPU_FX267_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014AF0UL)
#define CYREG_PERI_MS_PPU_FX267_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014AF4UL)
#define CYREG_PERI_MS_PPU_FX267_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014AF8UL)
#define CYREG_PERI_MS_PPU_FX267_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX268)
  */
#define CYREG_PERI_MS_PPU_FX268_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014B00UL)
#define CYREG_PERI_MS_PPU_FX268_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014B04UL)
#define CYREG_PERI_MS_PPU_FX268_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014B10UL)
#define CYREG_PERI_MS_PPU_FX268_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014B14UL)
#define CYREG_PERI_MS_PPU_FX268_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014B18UL)
#define CYREG_PERI_MS_PPU_FX268_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014B1CUL)
#define CYREG_PERI_MS_PPU_FX268_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014B20UL)
#define CYREG_PERI_MS_PPU_FX268_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014B24UL)
#define CYREG_PERI_MS_PPU_FX268_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014B30UL)
#define CYREG_PERI_MS_PPU_FX268_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014B34UL)
#define CYREG_PERI_MS_PPU_FX268_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014B38UL)
#define CYREG_PERI_MS_PPU_FX268_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX269)
  */
#define CYREG_PERI_MS_PPU_FX269_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014B40UL)
#define CYREG_PERI_MS_PPU_FX269_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014B44UL)
#define CYREG_PERI_MS_PPU_FX269_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014B50UL)
#define CYREG_PERI_MS_PPU_FX269_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014B54UL)
#define CYREG_PERI_MS_PPU_FX269_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014B58UL)
#define CYREG_PERI_MS_PPU_FX269_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014B5CUL)
#define CYREG_PERI_MS_PPU_FX269_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014B60UL)
#define CYREG_PERI_MS_PPU_FX269_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014B64UL)
#define CYREG_PERI_MS_PPU_FX269_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014B70UL)
#define CYREG_PERI_MS_PPU_FX269_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014B74UL)
#define CYREG_PERI_MS_PPU_FX269_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014B78UL)
#define CYREG_PERI_MS_PPU_FX269_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX270)
  */
#define CYREG_PERI_MS_PPU_FX270_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014B80UL)
#define CYREG_PERI_MS_PPU_FX270_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014B84UL)
#define CYREG_PERI_MS_PPU_FX270_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014B90UL)
#define CYREG_PERI_MS_PPU_FX270_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014B94UL)
#define CYREG_PERI_MS_PPU_FX270_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014B98UL)
#define CYREG_PERI_MS_PPU_FX270_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014B9CUL)
#define CYREG_PERI_MS_PPU_FX270_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014BA0UL)
#define CYREG_PERI_MS_PPU_FX270_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014BA4UL)
#define CYREG_PERI_MS_PPU_FX270_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014BB0UL)
#define CYREG_PERI_MS_PPU_FX270_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014BB4UL)
#define CYREG_PERI_MS_PPU_FX270_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014BB8UL)
#define CYREG_PERI_MS_PPU_FX270_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX271)
  */
#define CYREG_PERI_MS_PPU_FX271_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014BC0UL)
#define CYREG_PERI_MS_PPU_FX271_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014BC4UL)
#define CYREG_PERI_MS_PPU_FX271_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014BD0UL)
#define CYREG_PERI_MS_PPU_FX271_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014BD4UL)
#define CYREG_PERI_MS_PPU_FX271_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014BD8UL)
#define CYREG_PERI_MS_PPU_FX271_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014BDCUL)
#define CYREG_PERI_MS_PPU_FX271_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014BE0UL)
#define CYREG_PERI_MS_PPU_FX271_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014BE4UL)
#define CYREG_PERI_MS_PPU_FX271_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014BF0UL)
#define CYREG_PERI_MS_PPU_FX271_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014BF4UL)
#define CYREG_PERI_MS_PPU_FX271_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014BF8UL)
#define CYREG_PERI_MS_PPU_FX271_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX272)
  */
#define CYREG_PERI_MS_PPU_FX272_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014C00UL)
#define CYREG_PERI_MS_PPU_FX272_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014C04UL)
#define CYREG_PERI_MS_PPU_FX272_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014C10UL)
#define CYREG_PERI_MS_PPU_FX272_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014C14UL)
#define CYREG_PERI_MS_PPU_FX272_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014C18UL)
#define CYREG_PERI_MS_PPU_FX272_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014C1CUL)
#define CYREG_PERI_MS_PPU_FX272_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014C20UL)
#define CYREG_PERI_MS_PPU_FX272_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014C24UL)
#define CYREG_PERI_MS_PPU_FX272_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014C30UL)
#define CYREG_PERI_MS_PPU_FX272_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014C34UL)
#define CYREG_PERI_MS_PPU_FX272_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014C38UL)
#define CYREG_PERI_MS_PPU_FX272_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX273)
  */
#define CYREG_PERI_MS_PPU_FX273_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014C40UL)
#define CYREG_PERI_MS_PPU_FX273_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014C44UL)
#define CYREG_PERI_MS_PPU_FX273_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014C50UL)
#define CYREG_PERI_MS_PPU_FX273_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014C54UL)
#define CYREG_PERI_MS_PPU_FX273_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014C58UL)
#define CYREG_PERI_MS_PPU_FX273_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014C5CUL)
#define CYREG_PERI_MS_PPU_FX273_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014C60UL)
#define CYREG_PERI_MS_PPU_FX273_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014C64UL)
#define CYREG_PERI_MS_PPU_FX273_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014C70UL)
#define CYREG_PERI_MS_PPU_FX273_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014C74UL)
#define CYREG_PERI_MS_PPU_FX273_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014C78UL)
#define CYREG_PERI_MS_PPU_FX273_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX274)
  */
#define CYREG_PERI_MS_PPU_FX274_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014C80UL)
#define CYREG_PERI_MS_PPU_FX274_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014C84UL)
#define CYREG_PERI_MS_PPU_FX274_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014C90UL)
#define CYREG_PERI_MS_PPU_FX274_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014C94UL)
#define CYREG_PERI_MS_PPU_FX274_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014C98UL)
#define CYREG_PERI_MS_PPU_FX274_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014C9CUL)
#define CYREG_PERI_MS_PPU_FX274_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014CA0UL)
#define CYREG_PERI_MS_PPU_FX274_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014CA4UL)
#define CYREG_PERI_MS_PPU_FX274_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014CB0UL)
#define CYREG_PERI_MS_PPU_FX274_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014CB4UL)
#define CYREG_PERI_MS_PPU_FX274_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014CB8UL)
#define CYREG_PERI_MS_PPU_FX274_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX275)
  */
#define CYREG_PERI_MS_PPU_FX275_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014CC0UL)
#define CYREG_PERI_MS_PPU_FX275_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014CC4UL)
#define CYREG_PERI_MS_PPU_FX275_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014CD0UL)
#define CYREG_PERI_MS_PPU_FX275_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014CD4UL)
#define CYREG_PERI_MS_PPU_FX275_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014CD8UL)
#define CYREG_PERI_MS_PPU_FX275_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014CDCUL)
#define CYREG_PERI_MS_PPU_FX275_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014CE0UL)
#define CYREG_PERI_MS_PPU_FX275_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014CE4UL)
#define CYREG_PERI_MS_PPU_FX275_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014CF0UL)
#define CYREG_PERI_MS_PPU_FX275_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014CF4UL)
#define CYREG_PERI_MS_PPU_FX275_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014CF8UL)
#define CYREG_PERI_MS_PPU_FX275_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX276)
  */
#define CYREG_PERI_MS_PPU_FX276_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014D00UL)
#define CYREG_PERI_MS_PPU_FX276_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014D04UL)
#define CYREG_PERI_MS_PPU_FX276_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014D10UL)
#define CYREG_PERI_MS_PPU_FX276_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014D14UL)
#define CYREG_PERI_MS_PPU_FX276_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014D18UL)
#define CYREG_PERI_MS_PPU_FX276_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014D1CUL)
#define CYREG_PERI_MS_PPU_FX276_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014D20UL)
#define CYREG_PERI_MS_PPU_FX276_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014D24UL)
#define CYREG_PERI_MS_PPU_FX276_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014D30UL)
#define CYREG_PERI_MS_PPU_FX276_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014D34UL)
#define CYREG_PERI_MS_PPU_FX276_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014D38UL)
#define CYREG_PERI_MS_PPU_FX276_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX277)
  */
#define CYREG_PERI_MS_PPU_FX277_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014D40UL)
#define CYREG_PERI_MS_PPU_FX277_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014D44UL)
#define CYREG_PERI_MS_PPU_FX277_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014D50UL)
#define CYREG_PERI_MS_PPU_FX277_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014D54UL)
#define CYREG_PERI_MS_PPU_FX277_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014D58UL)
#define CYREG_PERI_MS_PPU_FX277_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014D5CUL)
#define CYREG_PERI_MS_PPU_FX277_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014D60UL)
#define CYREG_PERI_MS_PPU_FX277_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014D64UL)
#define CYREG_PERI_MS_PPU_FX277_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014D70UL)
#define CYREG_PERI_MS_PPU_FX277_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014D74UL)
#define CYREG_PERI_MS_PPU_FX277_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014D78UL)
#define CYREG_PERI_MS_PPU_FX277_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX278)
  */
#define CYREG_PERI_MS_PPU_FX278_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014D80UL)
#define CYREG_PERI_MS_PPU_FX278_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014D84UL)
#define CYREG_PERI_MS_PPU_FX278_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014D90UL)
#define CYREG_PERI_MS_PPU_FX278_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014D94UL)
#define CYREG_PERI_MS_PPU_FX278_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014D98UL)
#define CYREG_PERI_MS_PPU_FX278_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014D9CUL)
#define CYREG_PERI_MS_PPU_FX278_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014DA0UL)
#define CYREG_PERI_MS_PPU_FX278_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014DA4UL)
#define CYREG_PERI_MS_PPU_FX278_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014DB0UL)
#define CYREG_PERI_MS_PPU_FX278_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014DB4UL)
#define CYREG_PERI_MS_PPU_FX278_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014DB8UL)
#define CYREG_PERI_MS_PPU_FX278_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX279)
  */
#define CYREG_PERI_MS_PPU_FX279_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014DC0UL)
#define CYREG_PERI_MS_PPU_FX279_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014DC4UL)
#define CYREG_PERI_MS_PPU_FX279_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014DD0UL)
#define CYREG_PERI_MS_PPU_FX279_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014DD4UL)
#define CYREG_PERI_MS_PPU_FX279_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014DD8UL)
#define CYREG_PERI_MS_PPU_FX279_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014DDCUL)
#define CYREG_PERI_MS_PPU_FX279_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014DE0UL)
#define CYREG_PERI_MS_PPU_FX279_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014DE4UL)
#define CYREG_PERI_MS_PPU_FX279_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014DF0UL)
#define CYREG_PERI_MS_PPU_FX279_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014DF4UL)
#define CYREG_PERI_MS_PPU_FX279_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014DF8UL)
#define CYREG_PERI_MS_PPU_FX279_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX280)
  */
#define CYREG_PERI_MS_PPU_FX280_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014E00UL)
#define CYREG_PERI_MS_PPU_FX280_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014E04UL)
#define CYREG_PERI_MS_PPU_FX280_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014E10UL)
#define CYREG_PERI_MS_PPU_FX280_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014E14UL)
#define CYREG_PERI_MS_PPU_FX280_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014E18UL)
#define CYREG_PERI_MS_PPU_FX280_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014E1CUL)
#define CYREG_PERI_MS_PPU_FX280_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014E20UL)
#define CYREG_PERI_MS_PPU_FX280_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014E24UL)
#define CYREG_PERI_MS_PPU_FX280_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014E30UL)
#define CYREG_PERI_MS_PPU_FX280_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014E34UL)
#define CYREG_PERI_MS_PPU_FX280_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014E38UL)
#define CYREG_PERI_MS_PPU_FX280_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX281)
  */
#define CYREG_PERI_MS_PPU_FX281_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014E40UL)
#define CYREG_PERI_MS_PPU_FX281_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014E44UL)
#define CYREG_PERI_MS_PPU_FX281_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014E50UL)
#define CYREG_PERI_MS_PPU_FX281_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014E54UL)
#define CYREG_PERI_MS_PPU_FX281_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014E58UL)
#define CYREG_PERI_MS_PPU_FX281_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014E5CUL)
#define CYREG_PERI_MS_PPU_FX281_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014E60UL)
#define CYREG_PERI_MS_PPU_FX281_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014E64UL)
#define CYREG_PERI_MS_PPU_FX281_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014E70UL)
#define CYREG_PERI_MS_PPU_FX281_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014E74UL)
#define CYREG_PERI_MS_PPU_FX281_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014E78UL)
#define CYREG_PERI_MS_PPU_FX281_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX282)
  */
#define CYREG_PERI_MS_PPU_FX282_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014E80UL)
#define CYREG_PERI_MS_PPU_FX282_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014E84UL)
#define CYREG_PERI_MS_PPU_FX282_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014E90UL)
#define CYREG_PERI_MS_PPU_FX282_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014E94UL)
#define CYREG_PERI_MS_PPU_FX282_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014E98UL)
#define CYREG_PERI_MS_PPU_FX282_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014E9CUL)
#define CYREG_PERI_MS_PPU_FX282_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014EA0UL)
#define CYREG_PERI_MS_PPU_FX282_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014EA4UL)
#define CYREG_PERI_MS_PPU_FX282_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014EB0UL)
#define CYREG_PERI_MS_PPU_FX282_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014EB4UL)
#define CYREG_PERI_MS_PPU_FX282_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014EB8UL)
#define CYREG_PERI_MS_PPU_FX282_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX283)
  */
#define CYREG_PERI_MS_PPU_FX283_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014EC0UL)
#define CYREG_PERI_MS_PPU_FX283_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014EC4UL)
#define CYREG_PERI_MS_PPU_FX283_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014ED0UL)
#define CYREG_PERI_MS_PPU_FX283_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014ED4UL)
#define CYREG_PERI_MS_PPU_FX283_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014ED8UL)
#define CYREG_PERI_MS_PPU_FX283_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014EDCUL)
#define CYREG_PERI_MS_PPU_FX283_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014EE0UL)
#define CYREG_PERI_MS_PPU_FX283_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014EE4UL)
#define CYREG_PERI_MS_PPU_FX283_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014EF0UL)
#define CYREG_PERI_MS_PPU_FX283_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014EF4UL)
#define CYREG_PERI_MS_PPU_FX283_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014EF8UL)
#define CYREG_PERI_MS_PPU_FX283_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX284)
  */
#define CYREG_PERI_MS_PPU_FX284_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014F00UL)
#define CYREG_PERI_MS_PPU_FX284_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014F04UL)
#define CYREG_PERI_MS_PPU_FX284_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014F10UL)
#define CYREG_PERI_MS_PPU_FX284_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014F14UL)
#define CYREG_PERI_MS_PPU_FX284_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014F18UL)
#define CYREG_PERI_MS_PPU_FX284_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014F1CUL)
#define CYREG_PERI_MS_PPU_FX284_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014F20UL)
#define CYREG_PERI_MS_PPU_FX284_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014F24UL)
#define CYREG_PERI_MS_PPU_FX284_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014F30UL)
#define CYREG_PERI_MS_PPU_FX284_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014F34UL)
#define CYREG_PERI_MS_PPU_FX284_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014F38UL)
#define CYREG_PERI_MS_PPU_FX284_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX285)
  */
#define CYREG_PERI_MS_PPU_FX285_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014F40UL)
#define CYREG_PERI_MS_PPU_FX285_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014F44UL)
#define CYREG_PERI_MS_PPU_FX285_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014F50UL)
#define CYREG_PERI_MS_PPU_FX285_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014F54UL)
#define CYREG_PERI_MS_PPU_FX285_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014F58UL)
#define CYREG_PERI_MS_PPU_FX285_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014F5CUL)
#define CYREG_PERI_MS_PPU_FX285_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014F60UL)
#define CYREG_PERI_MS_PPU_FX285_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014F64UL)
#define CYREG_PERI_MS_PPU_FX285_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014F70UL)
#define CYREG_PERI_MS_PPU_FX285_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014F74UL)
#define CYREG_PERI_MS_PPU_FX285_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014F78UL)
#define CYREG_PERI_MS_PPU_FX285_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX286)
  */
#define CYREG_PERI_MS_PPU_FX286_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014F80UL)
#define CYREG_PERI_MS_PPU_FX286_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014F84UL)
#define CYREG_PERI_MS_PPU_FX286_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014F90UL)
#define CYREG_PERI_MS_PPU_FX286_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014F94UL)
#define CYREG_PERI_MS_PPU_FX286_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014F98UL)
#define CYREG_PERI_MS_PPU_FX286_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014F9CUL)
#define CYREG_PERI_MS_PPU_FX286_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014FA0UL)
#define CYREG_PERI_MS_PPU_FX286_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014FA4UL)
#define CYREG_PERI_MS_PPU_FX286_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014FB0UL)
#define CYREG_PERI_MS_PPU_FX286_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014FB4UL)
#define CYREG_PERI_MS_PPU_FX286_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014FB8UL)
#define CYREG_PERI_MS_PPU_FX286_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX287)
  */
#define CYREG_PERI_MS_PPU_FX287_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40014FC0UL)
#define CYREG_PERI_MS_PPU_FX287_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40014FC4UL)
#define CYREG_PERI_MS_PPU_FX287_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40014FD0UL)
#define CYREG_PERI_MS_PPU_FX287_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40014FD4UL)
#define CYREG_PERI_MS_PPU_FX287_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40014FD8UL)
#define CYREG_PERI_MS_PPU_FX287_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40014FDCUL)
#define CYREG_PERI_MS_PPU_FX287_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40014FE0UL)
#define CYREG_PERI_MS_PPU_FX287_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40014FE4UL)
#define CYREG_PERI_MS_PPU_FX287_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40014FF0UL)
#define CYREG_PERI_MS_PPU_FX287_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40014FF4UL)
#define CYREG_PERI_MS_PPU_FX287_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40014FF8UL)
#define CYREG_PERI_MS_PPU_FX287_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40014FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX288)
  */
#define CYREG_PERI_MS_PPU_FX288_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015000UL)
#define CYREG_PERI_MS_PPU_FX288_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015004UL)
#define CYREG_PERI_MS_PPU_FX288_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015010UL)
#define CYREG_PERI_MS_PPU_FX288_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015014UL)
#define CYREG_PERI_MS_PPU_FX288_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015018UL)
#define CYREG_PERI_MS_PPU_FX288_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001501CUL)
#define CYREG_PERI_MS_PPU_FX288_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015020UL)
#define CYREG_PERI_MS_PPU_FX288_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015024UL)
#define CYREG_PERI_MS_PPU_FX288_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015030UL)
#define CYREG_PERI_MS_PPU_FX288_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015034UL)
#define CYREG_PERI_MS_PPU_FX288_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015038UL)
#define CYREG_PERI_MS_PPU_FX288_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001503CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX289)
  */
#define CYREG_PERI_MS_PPU_FX289_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015040UL)
#define CYREG_PERI_MS_PPU_FX289_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015044UL)
#define CYREG_PERI_MS_PPU_FX289_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015050UL)
#define CYREG_PERI_MS_PPU_FX289_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015054UL)
#define CYREG_PERI_MS_PPU_FX289_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015058UL)
#define CYREG_PERI_MS_PPU_FX289_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001505CUL)
#define CYREG_PERI_MS_PPU_FX289_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015060UL)
#define CYREG_PERI_MS_PPU_FX289_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015064UL)
#define CYREG_PERI_MS_PPU_FX289_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015070UL)
#define CYREG_PERI_MS_PPU_FX289_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015074UL)
#define CYREG_PERI_MS_PPU_FX289_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015078UL)
#define CYREG_PERI_MS_PPU_FX289_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001507CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX290)
  */
#define CYREG_PERI_MS_PPU_FX290_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015080UL)
#define CYREG_PERI_MS_PPU_FX290_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015084UL)
#define CYREG_PERI_MS_PPU_FX290_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015090UL)
#define CYREG_PERI_MS_PPU_FX290_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015094UL)
#define CYREG_PERI_MS_PPU_FX290_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015098UL)
#define CYREG_PERI_MS_PPU_FX290_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001509CUL)
#define CYREG_PERI_MS_PPU_FX290_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400150A0UL)
#define CYREG_PERI_MS_PPU_FX290_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400150A4UL)
#define CYREG_PERI_MS_PPU_FX290_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400150B0UL)
#define CYREG_PERI_MS_PPU_FX290_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400150B4UL)
#define CYREG_PERI_MS_PPU_FX290_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400150B8UL)
#define CYREG_PERI_MS_PPU_FX290_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400150BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX291)
  */
#define CYREG_PERI_MS_PPU_FX291_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400150C0UL)
#define CYREG_PERI_MS_PPU_FX291_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400150C4UL)
#define CYREG_PERI_MS_PPU_FX291_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400150D0UL)
#define CYREG_PERI_MS_PPU_FX291_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400150D4UL)
#define CYREG_PERI_MS_PPU_FX291_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400150D8UL)
#define CYREG_PERI_MS_PPU_FX291_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400150DCUL)
#define CYREG_PERI_MS_PPU_FX291_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400150E0UL)
#define CYREG_PERI_MS_PPU_FX291_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400150E4UL)
#define CYREG_PERI_MS_PPU_FX291_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400150F0UL)
#define CYREG_PERI_MS_PPU_FX291_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400150F4UL)
#define CYREG_PERI_MS_PPU_FX291_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400150F8UL)
#define CYREG_PERI_MS_PPU_FX291_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400150FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX292)
  */
#define CYREG_PERI_MS_PPU_FX292_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015100UL)
#define CYREG_PERI_MS_PPU_FX292_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015104UL)
#define CYREG_PERI_MS_PPU_FX292_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015110UL)
#define CYREG_PERI_MS_PPU_FX292_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015114UL)
#define CYREG_PERI_MS_PPU_FX292_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015118UL)
#define CYREG_PERI_MS_PPU_FX292_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001511CUL)
#define CYREG_PERI_MS_PPU_FX292_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015120UL)
#define CYREG_PERI_MS_PPU_FX292_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015124UL)
#define CYREG_PERI_MS_PPU_FX292_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015130UL)
#define CYREG_PERI_MS_PPU_FX292_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015134UL)
#define CYREG_PERI_MS_PPU_FX292_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015138UL)
#define CYREG_PERI_MS_PPU_FX292_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001513CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX293)
  */
#define CYREG_PERI_MS_PPU_FX293_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015140UL)
#define CYREG_PERI_MS_PPU_FX293_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015144UL)
#define CYREG_PERI_MS_PPU_FX293_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015150UL)
#define CYREG_PERI_MS_PPU_FX293_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015154UL)
#define CYREG_PERI_MS_PPU_FX293_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015158UL)
#define CYREG_PERI_MS_PPU_FX293_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001515CUL)
#define CYREG_PERI_MS_PPU_FX293_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015160UL)
#define CYREG_PERI_MS_PPU_FX293_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015164UL)
#define CYREG_PERI_MS_PPU_FX293_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015170UL)
#define CYREG_PERI_MS_PPU_FX293_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015174UL)
#define CYREG_PERI_MS_PPU_FX293_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015178UL)
#define CYREG_PERI_MS_PPU_FX293_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001517CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX294)
  */
#define CYREG_PERI_MS_PPU_FX294_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015180UL)
#define CYREG_PERI_MS_PPU_FX294_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015184UL)
#define CYREG_PERI_MS_PPU_FX294_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015190UL)
#define CYREG_PERI_MS_PPU_FX294_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015194UL)
#define CYREG_PERI_MS_PPU_FX294_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015198UL)
#define CYREG_PERI_MS_PPU_FX294_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001519CUL)
#define CYREG_PERI_MS_PPU_FX294_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400151A0UL)
#define CYREG_PERI_MS_PPU_FX294_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400151A4UL)
#define CYREG_PERI_MS_PPU_FX294_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400151B0UL)
#define CYREG_PERI_MS_PPU_FX294_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400151B4UL)
#define CYREG_PERI_MS_PPU_FX294_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400151B8UL)
#define CYREG_PERI_MS_PPU_FX294_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400151BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX295)
  */
#define CYREG_PERI_MS_PPU_FX295_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400151C0UL)
#define CYREG_PERI_MS_PPU_FX295_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400151C4UL)
#define CYREG_PERI_MS_PPU_FX295_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400151D0UL)
#define CYREG_PERI_MS_PPU_FX295_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400151D4UL)
#define CYREG_PERI_MS_PPU_FX295_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400151D8UL)
#define CYREG_PERI_MS_PPU_FX295_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400151DCUL)
#define CYREG_PERI_MS_PPU_FX295_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400151E0UL)
#define CYREG_PERI_MS_PPU_FX295_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400151E4UL)
#define CYREG_PERI_MS_PPU_FX295_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400151F0UL)
#define CYREG_PERI_MS_PPU_FX295_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400151F4UL)
#define CYREG_PERI_MS_PPU_FX295_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400151F8UL)
#define CYREG_PERI_MS_PPU_FX295_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400151FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX296)
  */
#define CYREG_PERI_MS_PPU_FX296_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015200UL)
#define CYREG_PERI_MS_PPU_FX296_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015204UL)
#define CYREG_PERI_MS_PPU_FX296_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015210UL)
#define CYREG_PERI_MS_PPU_FX296_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015214UL)
#define CYREG_PERI_MS_PPU_FX296_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015218UL)
#define CYREG_PERI_MS_PPU_FX296_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001521CUL)
#define CYREG_PERI_MS_PPU_FX296_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015220UL)
#define CYREG_PERI_MS_PPU_FX296_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015224UL)
#define CYREG_PERI_MS_PPU_FX296_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015230UL)
#define CYREG_PERI_MS_PPU_FX296_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015234UL)
#define CYREG_PERI_MS_PPU_FX296_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015238UL)
#define CYREG_PERI_MS_PPU_FX296_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001523CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX297)
  */
#define CYREG_PERI_MS_PPU_FX297_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015240UL)
#define CYREG_PERI_MS_PPU_FX297_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015244UL)
#define CYREG_PERI_MS_PPU_FX297_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015250UL)
#define CYREG_PERI_MS_PPU_FX297_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015254UL)
#define CYREG_PERI_MS_PPU_FX297_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015258UL)
#define CYREG_PERI_MS_PPU_FX297_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001525CUL)
#define CYREG_PERI_MS_PPU_FX297_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015260UL)
#define CYREG_PERI_MS_PPU_FX297_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015264UL)
#define CYREG_PERI_MS_PPU_FX297_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015270UL)
#define CYREG_PERI_MS_PPU_FX297_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015274UL)
#define CYREG_PERI_MS_PPU_FX297_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015278UL)
#define CYREG_PERI_MS_PPU_FX297_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001527CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX298)
  */
#define CYREG_PERI_MS_PPU_FX298_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015280UL)
#define CYREG_PERI_MS_PPU_FX298_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015284UL)
#define CYREG_PERI_MS_PPU_FX298_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015290UL)
#define CYREG_PERI_MS_PPU_FX298_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015294UL)
#define CYREG_PERI_MS_PPU_FX298_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015298UL)
#define CYREG_PERI_MS_PPU_FX298_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001529CUL)
#define CYREG_PERI_MS_PPU_FX298_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400152A0UL)
#define CYREG_PERI_MS_PPU_FX298_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400152A4UL)
#define CYREG_PERI_MS_PPU_FX298_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400152B0UL)
#define CYREG_PERI_MS_PPU_FX298_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400152B4UL)
#define CYREG_PERI_MS_PPU_FX298_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400152B8UL)
#define CYREG_PERI_MS_PPU_FX298_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400152BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX299)
  */
#define CYREG_PERI_MS_PPU_FX299_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400152C0UL)
#define CYREG_PERI_MS_PPU_FX299_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400152C4UL)
#define CYREG_PERI_MS_PPU_FX299_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400152D0UL)
#define CYREG_PERI_MS_PPU_FX299_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400152D4UL)
#define CYREG_PERI_MS_PPU_FX299_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400152D8UL)
#define CYREG_PERI_MS_PPU_FX299_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400152DCUL)
#define CYREG_PERI_MS_PPU_FX299_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400152E0UL)
#define CYREG_PERI_MS_PPU_FX299_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400152E4UL)
#define CYREG_PERI_MS_PPU_FX299_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400152F0UL)
#define CYREG_PERI_MS_PPU_FX299_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400152F4UL)
#define CYREG_PERI_MS_PPU_FX299_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400152F8UL)
#define CYREG_PERI_MS_PPU_FX299_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400152FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX300)
  */
#define CYREG_PERI_MS_PPU_FX300_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015300UL)
#define CYREG_PERI_MS_PPU_FX300_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015304UL)
#define CYREG_PERI_MS_PPU_FX300_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015310UL)
#define CYREG_PERI_MS_PPU_FX300_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015314UL)
#define CYREG_PERI_MS_PPU_FX300_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015318UL)
#define CYREG_PERI_MS_PPU_FX300_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001531CUL)
#define CYREG_PERI_MS_PPU_FX300_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015320UL)
#define CYREG_PERI_MS_PPU_FX300_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015324UL)
#define CYREG_PERI_MS_PPU_FX300_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015330UL)
#define CYREG_PERI_MS_PPU_FX300_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015334UL)
#define CYREG_PERI_MS_PPU_FX300_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015338UL)
#define CYREG_PERI_MS_PPU_FX300_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001533CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX301)
  */
#define CYREG_PERI_MS_PPU_FX301_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015340UL)
#define CYREG_PERI_MS_PPU_FX301_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015344UL)
#define CYREG_PERI_MS_PPU_FX301_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015350UL)
#define CYREG_PERI_MS_PPU_FX301_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015354UL)
#define CYREG_PERI_MS_PPU_FX301_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015358UL)
#define CYREG_PERI_MS_PPU_FX301_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001535CUL)
#define CYREG_PERI_MS_PPU_FX301_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015360UL)
#define CYREG_PERI_MS_PPU_FX301_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015364UL)
#define CYREG_PERI_MS_PPU_FX301_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015370UL)
#define CYREG_PERI_MS_PPU_FX301_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015374UL)
#define CYREG_PERI_MS_PPU_FX301_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015378UL)
#define CYREG_PERI_MS_PPU_FX301_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001537CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX302)
  */
#define CYREG_PERI_MS_PPU_FX302_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015380UL)
#define CYREG_PERI_MS_PPU_FX302_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015384UL)
#define CYREG_PERI_MS_PPU_FX302_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015390UL)
#define CYREG_PERI_MS_PPU_FX302_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015394UL)
#define CYREG_PERI_MS_PPU_FX302_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015398UL)
#define CYREG_PERI_MS_PPU_FX302_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001539CUL)
#define CYREG_PERI_MS_PPU_FX302_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400153A0UL)
#define CYREG_PERI_MS_PPU_FX302_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400153A4UL)
#define CYREG_PERI_MS_PPU_FX302_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400153B0UL)
#define CYREG_PERI_MS_PPU_FX302_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400153B4UL)
#define CYREG_PERI_MS_PPU_FX302_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400153B8UL)
#define CYREG_PERI_MS_PPU_FX302_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400153BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX303)
  */
#define CYREG_PERI_MS_PPU_FX303_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400153C0UL)
#define CYREG_PERI_MS_PPU_FX303_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400153C4UL)
#define CYREG_PERI_MS_PPU_FX303_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400153D0UL)
#define CYREG_PERI_MS_PPU_FX303_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400153D4UL)
#define CYREG_PERI_MS_PPU_FX303_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400153D8UL)
#define CYREG_PERI_MS_PPU_FX303_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400153DCUL)
#define CYREG_PERI_MS_PPU_FX303_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400153E0UL)
#define CYREG_PERI_MS_PPU_FX303_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400153E4UL)
#define CYREG_PERI_MS_PPU_FX303_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400153F0UL)
#define CYREG_PERI_MS_PPU_FX303_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400153F4UL)
#define CYREG_PERI_MS_PPU_FX303_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400153F8UL)
#define CYREG_PERI_MS_PPU_FX303_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400153FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX304)
  */
#define CYREG_PERI_MS_PPU_FX304_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015400UL)
#define CYREG_PERI_MS_PPU_FX304_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015404UL)
#define CYREG_PERI_MS_PPU_FX304_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015410UL)
#define CYREG_PERI_MS_PPU_FX304_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015414UL)
#define CYREG_PERI_MS_PPU_FX304_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015418UL)
#define CYREG_PERI_MS_PPU_FX304_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001541CUL)
#define CYREG_PERI_MS_PPU_FX304_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015420UL)
#define CYREG_PERI_MS_PPU_FX304_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015424UL)
#define CYREG_PERI_MS_PPU_FX304_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015430UL)
#define CYREG_PERI_MS_PPU_FX304_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015434UL)
#define CYREG_PERI_MS_PPU_FX304_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015438UL)
#define CYREG_PERI_MS_PPU_FX304_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001543CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX305)
  */
#define CYREG_PERI_MS_PPU_FX305_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015440UL)
#define CYREG_PERI_MS_PPU_FX305_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015444UL)
#define CYREG_PERI_MS_PPU_FX305_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015450UL)
#define CYREG_PERI_MS_PPU_FX305_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015454UL)
#define CYREG_PERI_MS_PPU_FX305_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015458UL)
#define CYREG_PERI_MS_PPU_FX305_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001545CUL)
#define CYREG_PERI_MS_PPU_FX305_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015460UL)
#define CYREG_PERI_MS_PPU_FX305_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015464UL)
#define CYREG_PERI_MS_PPU_FX305_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015470UL)
#define CYREG_PERI_MS_PPU_FX305_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015474UL)
#define CYREG_PERI_MS_PPU_FX305_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015478UL)
#define CYREG_PERI_MS_PPU_FX305_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001547CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX306)
  */
#define CYREG_PERI_MS_PPU_FX306_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015480UL)
#define CYREG_PERI_MS_PPU_FX306_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015484UL)
#define CYREG_PERI_MS_PPU_FX306_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015490UL)
#define CYREG_PERI_MS_PPU_FX306_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015494UL)
#define CYREG_PERI_MS_PPU_FX306_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015498UL)
#define CYREG_PERI_MS_PPU_FX306_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001549CUL)
#define CYREG_PERI_MS_PPU_FX306_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400154A0UL)
#define CYREG_PERI_MS_PPU_FX306_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400154A4UL)
#define CYREG_PERI_MS_PPU_FX306_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400154B0UL)
#define CYREG_PERI_MS_PPU_FX306_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400154B4UL)
#define CYREG_PERI_MS_PPU_FX306_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400154B8UL)
#define CYREG_PERI_MS_PPU_FX306_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400154BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX307)
  */
#define CYREG_PERI_MS_PPU_FX307_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400154C0UL)
#define CYREG_PERI_MS_PPU_FX307_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400154C4UL)
#define CYREG_PERI_MS_PPU_FX307_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400154D0UL)
#define CYREG_PERI_MS_PPU_FX307_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400154D4UL)
#define CYREG_PERI_MS_PPU_FX307_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400154D8UL)
#define CYREG_PERI_MS_PPU_FX307_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400154DCUL)
#define CYREG_PERI_MS_PPU_FX307_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400154E0UL)
#define CYREG_PERI_MS_PPU_FX307_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400154E4UL)
#define CYREG_PERI_MS_PPU_FX307_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400154F0UL)
#define CYREG_PERI_MS_PPU_FX307_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400154F4UL)
#define CYREG_PERI_MS_PPU_FX307_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400154F8UL)
#define CYREG_PERI_MS_PPU_FX307_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400154FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX308)
  */
#define CYREG_PERI_MS_PPU_FX308_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015500UL)
#define CYREG_PERI_MS_PPU_FX308_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015504UL)
#define CYREG_PERI_MS_PPU_FX308_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015510UL)
#define CYREG_PERI_MS_PPU_FX308_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015514UL)
#define CYREG_PERI_MS_PPU_FX308_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015518UL)
#define CYREG_PERI_MS_PPU_FX308_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001551CUL)
#define CYREG_PERI_MS_PPU_FX308_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015520UL)
#define CYREG_PERI_MS_PPU_FX308_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015524UL)
#define CYREG_PERI_MS_PPU_FX308_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015530UL)
#define CYREG_PERI_MS_PPU_FX308_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015534UL)
#define CYREG_PERI_MS_PPU_FX308_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015538UL)
#define CYREG_PERI_MS_PPU_FX308_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001553CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX309)
  */
#define CYREG_PERI_MS_PPU_FX309_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015540UL)
#define CYREG_PERI_MS_PPU_FX309_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015544UL)
#define CYREG_PERI_MS_PPU_FX309_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015550UL)
#define CYREG_PERI_MS_PPU_FX309_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015554UL)
#define CYREG_PERI_MS_PPU_FX309_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015558UL)
#define CYREG_PERI_MS_PPU_FX309_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001555CUL)
#define CYREG_PERI_MS_PPU_FX309_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015560UL)
#define CYREG_PERI_MS_PPU_FX309_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015564UL)
#define CYREG_PERI_MS_PPU_FX309_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015570UL)
#define CYREG_PERI_MS_PPU_FX309_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015574UL)
#define CYREG_PERI_MS_PPU_FX309_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015578UL)
#define CYREG_PERI_MS_PPU_FX309_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001557CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX310)
  */
#define CYREG_PERI_MS_PPU_FX310_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015580UL)
#define CYREG_PERI_MS_PPU_FX310_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015584UL)
#define CYREG_PERI_MS_PPU_FX310_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015590UL)
#define CYREG_PERI_MS_PPU_FX310_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015594UL)
#define CYREG_PERI_MS_PPU_FX310_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015598UL)
#define CYREG_PERI_MS_PPU_FX310_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001559CUL)
#define CYREG_PERI_MS_PPU_FX310_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400155A0UL)
#define CYREG_PERI_MS_PPU_FX310_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400155A4UL)
#define CYREG_PERI_MS_PPU_FX310_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400155B0UL)
#define CYREG_PERI_MS_PPU_FX310_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400155B4UL)
#define CYREG_PERI_MS_PPU_FX310_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400155B8UL)
#define CYREG_PERI_MS_PPU_FX310_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400155BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX311)
  */
#define CYREG_PERI_MS_PPU_FX311_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400155C0UL)
#define CYREG_PERI_MS_PPU_FX311_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400155C4UL)
#define CYREG_PERI_MS_PPU_FX311_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400155D0UL)
#define CYREG_PERI_MS_PPU_FX311_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400155D4UL)
#define CYREG_PERI_MS_PPU_FX311_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400155D8UL)
#define CYREG_PERI_MS_PPU_FX311_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400155DCUL)
#define CYREG_PERI_MS_PPU_FX311_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400155E0UL)
#define CYREG_PERI_MS_PPU_FX311_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400155E4UL)
#define CYREG_PERI_MS_PPU_FX311_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400155F0UL)
#define CYREG_PERI_MS_PPU_FX311_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400155F4UL)
#define CYREG_PERI_MS_PPU_FX311_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400155F8UL)
#define CYREG_PERI_MS_PPU_FX311_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400155FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX312)
  */
#define CYREG_PERI_MS_PPU_FX312_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015600UL)
#define CYREG_PERI_MS_PPU_FX312_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015604UL)
#define CYREG_PERI_MS_PPU_FX312_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015610UL)
#define CYREG_PERI_MS_PPU_FX312_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015614UL)
#define CYREG_PERI_MS_PPU_FX312_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015618UL)
#define CYREG_PERI_MS_PPU_FX312_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001561CUL)
#define CYREG_PERI_MS_PPU_FX312_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015620UL)
#define CYREG_PERI_MS_PPU_FX312_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015624UL)
#define CYREG_PERI_MS_PPU_FX312_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015630UL)
#define CYREG_PERI_MS_PPU_FX312_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015634UL)
#define CYREG_PERI_MS_PPU_FX312_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015638UL)
#define CYREG_PERI_MS_PPU_FX312_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001563CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX313)
  */
#define CYREG_PERI_MS_PPU_FX313_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015640UL)
#define CYREG_PERI_MS_PPU_FX313_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015644UL)
#define CYREG_PERI_MS_PPU_FX313_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015650UL)
#define CYREG_PERI_MS_PPU_FX313_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015654UL)
#define CYREG_PERI_MS_PPU_FX313_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015658UL)
#define CYREG_PERI_MS_PPU_FX313_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001565CUL)
#define CYREG_PERI_MS_PPU_FX313_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015660UL)
#define CYREG_PERI_MS_PPU_FX313_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015664UL)
#define CYREG_PERI_MS_PPU_FX313_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015670UL)
#define CYREG_PERI_MS_PPU_FX313_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015674UL)
#define CYREG_PERI_MS_PPU_FX313_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015678UL)
#define CYREG_PERI_MS_PPU_FX313_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001567CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX314)
  */
#define CYREG_PERI_MS_PPU_FX314_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015680UL)
#define CYREG_PERI_MS_PPU_FX314_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015684UL)
#define CYREG_PERI_MS_PPU_FX314_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015690UL)
#define CYREG_PERI_MS_PPU_FX314_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015694UL)
#define CYREG_PERI_MS_PPU_FX314_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015698UL)
#define CYREG_PERI_MS_PPU_FX314_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001569CUL)
#define CYREG_PERI_MS_PPU_FX314_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400156A0UL)
#define CYREG_PERI_MS_PPU_FX314_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400156A4UL)
#define CYREG_PERI_MS_PPU_FX314_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400156B0UL)
#define CYREG_PERI_MS_PPU_FX314_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400156B4UL)
#define CYREG_PERI_MS_PPU_FX314_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400156B8UL)
#define CYREG_PERI_MS_PPU_FX314_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400156BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX315)
  */
#define CYREG_PERI_MS_PPU_FX315_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400156C0UL)
#define CYREG_PERI_MS_PPU_FX315_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400156C4UL)
#define CYREG_PERI_MS_PPU_FX315_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400156D0UL)
#define CYREG_PERI_MS_PPU_FX315_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400156D4UL)
#define CYREG_PERI_MS_PPU_FX315_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400156D8UL)
#define CYREG_PERI_MS_PPU_FX315_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400156DCUL)
#define CYREG_PERI_MS_PPU_FX315_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400156E0UL)
#define CYREG_PERI_MS_PPU_FX315_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400156E4UL)
#define CYREG_PERI_MS_PPU_FX315_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400156F0UL)
#define CYREG_PERI_MS_PPU_FX315_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400156F4UL)
#define CYREG_PERI_MS_PPU_FX315_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400156F8UL)
#define CYREG_PERI_MS_PPU_FX315_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400156FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX316)
  */
#define CYREG_PERI_MS_PPU_FX316_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015700UL)
#define CYREG_PERI_MS_PPU_FX316_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015704UL)
#define CYREG_PERI_MS_PPU_FX316_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015710UL)
#define CYREG_PERI_MS_PPU_FX316_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015714UL)
#define CYREG_PERI_MS_PPU_FX316_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015718UL)
#define CYREG_PERI_MS_PPU_FX316_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001571CUL)
#define CYREG_PERI_MS_PPU_FX316_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015720UL)
#define CYREG_PERI_MS_PPU_FX316_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015724UL)
#define CYREG_PERI_MS_PPU_FX316_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015730UL)
#define CYREG_PERI_MS_PPU_FX316_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015734UL)
#define CYREG_PERI_MS_PPU_FX316_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015738UL)
#define CYREG_PERI_MS_PPU_FX316_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001573CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX317)
  */
#define CYREG_PERI_MS_PPU_FX317_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015740UL)
#define CYREG_PERI_MS_PPU_FX317_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015744UL)
#define CYREG_PERI_MS_PPU_FX317_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015750UL)
#define CYREG_PERI_MS_PPU_FX317_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015754UL)
#define CYREG_PERI_MS_PPU_FX317_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015758UL)
#define CYREG_PERI_MS_PPU_FX317_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001575CUL)
#define CYREG_PERI_MS_PPU_FX317_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015760UL)
#define CYREG_PERI_MS_PPU_FX317_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015764UL)
#define CYREG_PERI_MS_PPU_FX317_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015770UL)
#define CYREG_PERI_MS_PPU_FX317_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015774UL)
#define CYREG_PERI_MS_PPU_FX317_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015778UL)
#define CYREG_PERI_MS_PPU_FX317_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001577CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX318)
  */
#define CYREG_PERI_MS_PPU_FX318_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015780UL)
#define CYREG_PERI_MS_PPU_FX318_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015784UL)
#define CYREG_PERI_MS_PPU_FX318_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015790UL)
#define CYREG_PERI_MS_PPU_FX318_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015794UL)
#define CYREG_PERI_MS_PPU_FX318_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015798UL)
#define CYREG_PERI_MS_PPU_FX318_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001579CUL)
#define CYREG_PERI_MS_PPU_FX318_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400157A0UL)
#define CYREG_PERI_MS_PPU_FX318_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400157A4UL)
#define CYREG_PERI_MS_PPU_FX318_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400157B0UL)
#define CYREG_PERI_MS_PPU_FX318_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400157B4UL)
#define CYREG_PERI_MS_PPU_FX318_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400157B8UL)
#define CYREG_PERI_MS_PPU_FX318_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400157BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX319)
  */
#define CYREG_PERI_MS_PPU_FX319_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400157C0UL)
#define CYREG_PERI_MS_PPU_FX319_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400157C4UL)
#define CYREG_PERI_MS_PPU_FX319_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400157D0UL)
#define CYREG_PERI_MS_PPU_FX319_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400157D4UL)
#define CYREG_PERI_MS_PPU_FX319_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400157D8UL)
#define CYREG_PERI_MS_PPU_FX319_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400157DCUL)
#define CYREG_PERI_MS_PPU_FX319_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400157E0UL)
#define CYREG_PERI_MS_PPU_FX319_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400157E4UL)
#define CYREG_PERI_MS_PPU_FX319_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400157F0UL)
#define CYREG_PERI_MS_PPU_FX319_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400157F4UL)
#define CYREG_PERI_MS_PPU_FX319_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400157F8UL)
#define CYREG_PERI_MS_PPU_FX319_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400157FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX320)
  */
#define CYREG_PERI_MS_PPU_FX320_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015800UL)
#define CYREG_PERI_MS_PPU_FX320_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015804UL)
#define CYREG_PERI_MS_PPU_FX320_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015810UL)
#define CYREG_PERI_MS_PPU_FX320_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015814UL)
#define CYREG_PERI_MS_PPU_FX320_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015818UL)
#define CYREG_PERI_MS_PPU_FX320_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001581CUL)
#define CYREG_PERI_MS_PPU_FX320_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015820UL)
#define CYREG_PERI_MS_PPU_FX320_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015824UL)
#define CYREG_PERI_MS_PPU_FX320_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015830UL)
#define CYREG_PERI_MS_PPU_FX320_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015834UL)
#define CYREG_PERI_MS_PPU_FX320_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015838UL)
#define CYREG_PERI_MS_PPU_FX320_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001583CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX321)
  */
#define CYREG_PERI_MS_PPU_FX321_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015840UL)
#define CYREG_PERI_MS_PPU_FX321_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015844UL)
#define CYREG_PERI_MS_PPU_FX321_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015850UL)
#define CYREG_PERI_MS_PPU_FX321_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015854UL)
#define CYREG_PERI_MS_PPU_FX321_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015858UL)
#define CYREG_PERI_MS_PPU_FX321_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001585CUL)
#define CYREG_PERI_MS_PPU_FX321_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015860UL)
#define CYREG_PERI_MS_PPU_FX321_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015864UL)
#define CYREG_PERI_MS_PPU_FX321_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015870UL)
#define CYREG_PERI_MS_PPU_FX321_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015874UL)
#define CYREG_PERI_MS_PPU_FX321_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015878UL)
#define CYREG_PERI_MS_PPU_FX321_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001587CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX322)
  */
#define CYREG_PERI_MS_PPU_FX322_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015880UL)
#define CYREG_PERI_MS_PPU_FX322_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015884UL)
#define CYREG_PERI_MS_PPU_FX322_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015890UL)
#define CYREG_PERI_MS_PPU_FX322_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015894UL)
#define CYREG_PERI_MS_PPU_FX322_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015898UL)
#define CYREG_PERI_MS_PPU_FX322_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001589CUL)
#define CYREG_PERI_MS_PPU_FX322_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400158A0UL)
#define CYREG_PERI_MS_PPU_FX322_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400158A4UL)
#define CYREG_PERI_MS_PPU_FX322_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400158B0UL)
#define CYREG_PERI_MS_PPU_FX322_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400158B4UL)
#define CYREG_PERI_MS_PPU_FX322_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400158B8UL)
#define CYREG_PERI_MS_PPU_FX322_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400158BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX323)
  */
#define CYREG_PERI_MS_PPU_FX323_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400158C0UL)
#define CYREG_PERI_MS_PPU_FX323_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400158C4UL)
#define CYREG_PERI_MS_PPU_FX323_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400158D0UL)
#define CYREG_PERI_MS_PPU_FX323_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400158D4UL)
#define CYREG_PERI_MS_PPU_FX323_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400158D8UL)
#define CYREG_PERI_MS_PPU_FX323_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400158DCUL)
#define CYREG_PERI_MS_PPU_FX323_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400158E0UL)
#define CYREG_PERI_MS_PPU_FX323_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400158E4UL)
#define CYREG_PERI_MS_PPU_FX323_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400158F0UL)
#define CYREG_PERI_MS_PPU_FX323_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400158F4UL)
#define CYREG_PERI_MS_PPU_FX323_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400158F8UL)
#define CYREG_PERI_MS_PPU_FX323_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400158FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX324)
  */
#define CYREG_PERI_MS_PPU_FX324_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015900UL)
#define CYREG_PERI_MS_PPU_FX324_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015904UL)
#define CYREG_PERI_MS_PPU_FX324_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015910UL)
#define CYREG_PERI_MS_PPU_FX324_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015914UL)
#define CYREG_PERI_MS_PPU_FX324_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015918UL)
#define CYREG_PERI_MS_PPU_FX324_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001591CUL)
#define CYREG_PERI_MS_PPU_FX324_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015920UL)
#define CYREG_PERI_MS_PPU_FX324_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015924UL)
#define CYREG_PERI_MS_PPU_FX324_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015930UL)
#define CYREG_PERI_MS_PPU_FX324_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015934UL)
#define CYREG_PERI_MS_PPU_FX324_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015938UL)
#define CYREG_PERI_MS_PPU_FX324_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001593CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX325)
  */
#define CYREG_PERI_MS_PPU_FX325_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015940UL)
#define CYREG_PERI_MS_PPU_FX325_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015944UL)
#define CYREG_PERI_MS_PPU_FX325_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015950UL)
#define CYREG_PERI_MS_PPU_FX325_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015954UL)
#define CYREG_PERI_MS_PPU_FX325_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015958UL)
#define CYREG_PERI_MS_PPU_FX325_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001595CUL)
#define CYREG_PERI_MS_PPU_FX325_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015960UL)
#define CYREG_PERI_MS_PPU_FX325_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015964UL)
#define CYREG_PERI_MS_PPU_FX325_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015970UL)
#define CYREG_PERI_MS_PPU_FX325_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015974UL)
#define CYREG_PERI_MS_PPU_FX325_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015978UL)
#define CYREG_PERI_MS_PPU_FX325_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001597CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX326)
  */
#define CYREG_PERI_MS_PPU_FX326_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015980UL)
#define CYREG_PERI_MS_PPU_FX326_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015984UL)
#define CYREG_PERI_MS_PPU_FX326_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015990UL)
#define CYREG_PERI_MS_PPU_FX326_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015994UL)
#define CYREG_PERI_MS_PPU_FX326_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015998UL)
#define CYREG_PERI_MS_PPU_FX326_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001599CUL)
#define CYREG_PERI_MS_PPU_FX326_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400159A0UL)
#define CYREG_PERI_MS_PPU_FX326_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400159A4UL)
#define CYREG_PERI_MS_PPU_FX326_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400159B0UL)
#define CYREG_PERI_MS_PPU_FX326_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400159B4UL)
#define CYREG_PERI_MS_PPU_FX326_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400159B8UL)
#define CYREG_PERI_MS_PPU_FX326_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400159BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX327)
  */
#define CYREG_PERI_MS_PPU_FX327_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400159C0UL)
#define CYREG_PERI_MS_PPU_FX327_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400159C4UL)
#define CYREG_PERI_MS_PPU_FX327_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400159D0UL)
#define CYREG_PERI_MS_PPU_FX327_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400159D4UL)
#define CYREG_PERI_MS_PPU_FX327_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400159D8UL)
#define CYREG_PERI_MS_PPU_FX327_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400159DCUL)
#define CYREG_PERI_MS_PPU_FX327_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400159E0UL)
#define CYREG_PERI_MS_PPU_FX327_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400159E4UL)
#define CYREG_PERI_MS_PPU_FX327_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400159F0UL)
#define CYREG_PERI_MS_PPU_FX327_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400159F4UL)
#define CYREG_PERI_MS_PPU_FX327_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400159F8UL)
#define CYREG_PERI_MS_PPU_FX327_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400159FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX328)
  */
#define CYREG_PERI_MS_PPU_FX328_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015A00UL)
#define CYREG_PERI_MS_PPU_FX328_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015A04UL)
#define CYREG_PERI_MS_PPU_FX328_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015A10UL)
#define CYREG_PERI_MS_PPU_FX328_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015A14UL)
#define CYREG_PERI_MS_PPU_FX328_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015A18UL)
#define CYREG_PERI_MS_PPU_FX328_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015A1CUL)
#define CYREG_PERI_MS_PPU_FX328_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015A20UL)
#define CYREG_PERI_MS_PPU_FX328_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015A24UL)
#define CYREG_PERI_MS_PPU_FX328_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015A30UL)
#define CYREG_PERI_MS_PPU_FX328_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015A34UL)
#define CYREG_PERI_MS_PPU_FX328_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015A38UL)
#define CYREG_PERI_MS_PPU_FX328_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX329)
  */
#define CYREG_PERI_MS_PPU_FX329_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015A40UL)
#define CYREG_PERI_MS_PPU_FX329_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015A44UL)
#define CYREG_PERI_MS_PPU_FX329_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015A50UL)
#define CYREG_PERI_MS_PPU_FX329_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015A54UL)
#define CYREG_PERI_MS_PPU_FX329_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015A58UL)
#define CYREG_PERI_MS_PPU_FX329_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015A5CUL)
#define CYREG_PERI_MS_PPU_FX329_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015A60UL)
#define CYREG_PERI_MS_PPU_FX329_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015A64UL)
#define CYREG_PERI_MS_PPU_FX329_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015A70UL)
#define CYREG_PERI_MS_PPU_FX329_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015A74UL)
#define CYREG_PERI_MS_PPU_FX329_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015A78UL)
#define CYREG_PERI_MS_PPU_FX329_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX330)
  */
#define CYREG_PERI_MS_PPU_FX330_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015A80UL)
#define CYREG_PERI_MS_PPU_FX330_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015A84UL)
#define CYREG_PERI_MS_PPU_FX330_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015A90UL)
#define CYREG_PERI_MS_PPU_FX330_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015A94UL)
#define CYREG_PERI_MS_PPU_FX330_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015A98UL)
#define CYREG_PERI_MS_PPU_FX330_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015A9CUL)
#define CYREG_PERI_MS_PPU_FX330_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015AA0UL)
#define CYREG_PERI_MS_PPU_FX330_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015AA4UL)
#define CYREG_PERI_MS_PPU_FX330_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015AB0UL)
#define CYREG_PERI_MS_PPU_FX330_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015AB4UL)
#define CYREG_PERI_MS_PPU_FX330_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015AB8UL)
#define CYREG_PERI_MS_PPU_FX330_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX331)
  */
#define CYREG_PERI_MS_PPU_FX331_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015AC0UL)
#define CYREG_PERI_MS_PPU_FX331_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015AC4UL)
#define CYREG_PERI_MS_PPU_FX331_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015AD0UL)
#define CYREG_PERI_MS_PPU_FX331_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015AD4UL)
#define CYREG_PERI_MS_PPU_FX331_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015AD8UL)
#define CYREG_PERI_MS_PPU_FX331_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015ADCUL)
#define CYREG_PERI_MS_PPU_FX331_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015AE0UL)
#define CYREG_PERI_MS_PPU_FX331_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015AE4UL)
#define CYREG_PERI_MS_PPU_FX331_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015AF0UL)
#define CYREG_PERI_MS_PPU_FX331_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015AF4UL)
#define CYREG_PERI_MS_PPU_FX331_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015AF8UL)
#define CYREG_PERI_MS_PPU_FX331_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX332)
  */
#define CYREG_PERI_MS_PPU_FX332_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015B00UL)
#define CYREG_PERI_MS_PPU_FX332_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015B04UL)
#define CYREG_PERI_MS_PPU_FX332_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015B10UL)
#define CYREG_PERI_MS_PPU_FX332_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015B14UL)
#define CYREG_PERI_MS_PPU_FX332_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015B18UL)
#define CYREG_PERI_MS_PPU_FX332_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015B1CUL)
#define CYREG_PERI_MS_PPU_FX332_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015B20UL)
#define CYREG_PERI_MS_PPU_FX332_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015B24UL)
#define CYREG_PERI_MS_PPU_FX332_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015B30UL)
#define CYREG_PERI_MS_PPU_FX332_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015B34UL)
#define CYREG_PERI_MS_PPU_FX332_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015B38UL)
#define CYREG_PERI_MS_PPU_FX332_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX333)
  */
#define CYREG_PERI_MS_PPU_FX333_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015B40UL)
#define CYREG_PERI_MS_PPU_FX333_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015B44UL)
#define CYREG_PERI_MS_PPU_FX333_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015B50UL)
#define CYREG_PERI_MS_PPU_FX333_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015B54UL)
#define CYREG_PERI_MS_PPU_FX333_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015B58UL)
#define CYREG_PERI_MS_PPU_FX333_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015B5CUL)
#define CYREG_PERI_MS_PPU_FX333_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015B60UL)
#define CYREG_PERI_MS_PPU_FX333_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015B64UL)
#define CYREG_PERI_MS_PPU_FX333_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015B70UL)
#define CYREG_PERI_MS_PPU_FX333_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015B74UL)
#define CYREG_PERI_MS_PPU_FX333_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015B78UL)
#define CYREG_PERI_MS_PPU_FX333_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX334)
  */
#define CYREG_PERI_MS_PPU_FX334_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015B80UL)
#define CYREG_PERI_MS_PPU_FX334_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015B84UL)
#define CYREG_PERI_MS_PPU_FX334_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015B90UL)
#define CYREG_PERI_MS_PPU_FX334_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015B94UL)
#define CYREG_PERI_MS_PPU_FX334_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015B98UL)
#define CYREG_PERI_MS_PPU_FX334_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015B9CUL)
#define CYREG_PERI_MS_PPU_FX334_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015BA0UL)
#define CYREG_PERI_MS_PPU_FX334_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015BA4UL)
#define CYREG_PERI_MS_PPU_FX334_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015BB0UL)
#define CYREG_PERI_MS_PPU_FX334_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015BB4UL)
#define CYREG_PERI_MS_PPU_FX334_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015BB8UL)
#define CYREG_PERI_MS_PPU_FX334_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX335)
  */
#define CYREG_PERI_MS_PPU_FX335_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015BC0UL)
#define CYREG_PERI_MS_PPU_FX335_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015BC4UL)
#define CYREG_PERI_MS_PPU_FX335_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015BD0UL)
#define CYREG_PERI_MS_PPU_FX335_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015BD4UL)
#define CYREG_PERI_MS_PPU_FX335_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015BD8UL)
#define CYREG_PERI_MS_PPU_FX335_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015BDCUL)
#define CYREG_PERI_MS_PPU_FX335_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015BE0UL)
#define CYREG_PERI_MS_PPU_FX335_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015BE4UL)
#define CYREG_PERI_MS_PPU_FX335_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015BF0UL)
#define CYREG_PERI_MS_PPU_FX335_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015BF4UL)
#define CYREG_PERI_MS_PPU_FX335_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015BF8UL)
#define CYREG_PERI_MS_PPU_FX335_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX336)
  */
#define CYREG_PERI_MS_PPU_FX336_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015C00UL)
#define CYREG_PERI_MS_PPU_FX336_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015C04UL)
#define CYREG_PERI_MS_PPU_FX336_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015C10UL)
#define CYREG_PERI_MS_PPU_FX336_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015C14UL)
#define CYREG_PERI_MS_PPU_FX336_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015C18UL)
#define CYREG_PERI_MS_PPU_FX336_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015C1CUL)
#define CYREG_PERI_MS_PPU_FX336_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015C20UL)
#define CYREG_PERI_MS_PPU_FX336_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015C24UL)
#define CYREG_PERI_MS_PPU_FX336_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015C30UL)
#define CYREG_PERI_MS_PPU_FX336_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015C34UL)
#define CYREG_PERI_MS_PPU_FX336_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015C38UL)
#define CYREG_PERI_MS_PPU_FX336_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX337)
  */
#define CYREG_PERI_MS_PPU_FX337_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015C40UL)
#define CYREG_PERI_MS_PPU_FX337_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015C44UL)
#define CYREG_PERI_MS_PPU_FX337_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015C50UL)
#define CYREG_PERI_MS_PPU_FX337_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015C54UL)
#define CYREG_PERI_MS_PPU_FX337_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015C58UL)
#define CYREG_PERI_MS_PPU_FX337_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015C5CUL)
#define CYREG_PERI_MS_PPU_FX337_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015C60UL)
#define CYREG_PERI_MS_PPU_FX337_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015C64UL)
#define CYREG_PERI_MS_PPU_FX337_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015C70UL)
#define CYREG_PERI_MS_PPU_FX337_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015C74UL)
#define CYREG_PERI_MS_PPU_FX337_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015C78UL)
#define CYREG_PERI_MS_PPU_FX337_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX338)
  */
#define CYREG_PERI_MS_PPU_FX338_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015C80UL)
#define CYREG_PERI_MS_PPU_FX338_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015C84UL)
#define CYREG_PERI_MS_PPU_FX338_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015C90UL)
#define CYREG_PERI_MS_PPU_FX338_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015C94UL)
#define CYREG_PERI_MS_PPU_FX338_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015C98UL)
#define CYREG_PERI_MS_PPU_FX338_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015C9CUL)
#define CYREG_PERI_MS_PPU_FX338_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015CA0UL)
#define CYREG_PERI_MS_PPU_FX338_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015CA4UL)
#define CYREG_PERI_MS_PPU_FX338_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015CB0UL)
#define CYREG_PERI_MS_PPU_FX338_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015CB4UL)
#define CYREG_PERI_MS_PPU_FX338_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015CB8UL)
#define CYREG_PERI_MS_PPU_FX338_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX339)
  */
#define CYREG_PERI_MS_PPU_FX339_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015CC0UL)
#define CYREG_PERI_MS_PPU_FX339_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015CC4UL)
#define CYREG_PERI_MS_PPU_FX339_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015CD0UL)
#define CYREG_PERI_MS_PPU_FX339_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015CD4UL)
#define CYREG_PERI_MS_PPU_FX339_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015CD8UL)
#define CYREG_PERI_MS_PPU_FX339_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015CDCUL)
#define CYREG_PERI_MS_PPU_FX339_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015CE0UL)
#define CYREG_PERI_MS_PPU_FX339_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015CE4UL)
#define CYREG_PERI_MS_PPU_FX339_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015CF0UL)
#define CYREG_PERI_MS_PPU_FX339_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015CF4UL)
#define CYREG_PERI_MS_PPU_FX339_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015CF8UL)
#define CYREG_PERI_MS_PPU_FX339_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX340)
  */
#define CYREG_PERI_MS_PPU_FX340_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015D00UL)
#define CYREG_PERI_MS_PPU_FX340_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015D04UL)
#define CYREG_PERI_MS_PPU_FX340_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015D10UL)
#define CYREG_PERI_MS_PPU_FX340_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015D14UL)
#define CYREG_PERI_MS_PPU_FX340_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015D18UL)
#define CYREG_PERI_MS_PPU_FX340_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015D1CUL)
#define CYREG_PERI_MS_PPU_FX340_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015D20UL)
#define CYREG_PERI_MS_PPU_FX340_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015D24UL)
#define CYREG_PERI_MS_PPU_FX340_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015D30UL)
#define CYREG_PERI_MS_PPU_FX340_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015D34UL)
#define CYREG_PERI_MS_PPU_FX340_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015D38UL)
#define CYREG_PERI_MS_PPU_FX340_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX341)
  */
#define CYREG_PERI_MS_PPU_FX341_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015D40UL)
#define CYREG_PERI_MS_PPU_FX341_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015D44UL)
#define CYREG_PERI_MS_PPU_FX341_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015D50UL)
#define CYREG_PERI_MS_PPU_FX341_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015D54UL)
#define CYREG_PERI_MS_PPU_FX341_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015D58UL)
#define CYREG_PERI_MS_PPU_FX341_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015D5CUL)
#define CYREG_PERI_MS_PPU_FX341_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015D60UL)
#define CYREG_PERI_MS_PPU_FX341_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015D64UL)
#define CYREG_PERI_MS_PPU_FX341_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015D70UL)
#define CYREG_PERI_MS_PPU_FX341_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015D74UL)
#define CYREG_PERI_MS_PPU_FX341_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015D78UL)
#define CYREG_PERI_MS_PPU_FX341_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX342)
  */
#define CYREG_PERI_MS_PPU_FX342_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015D80UL)
#define CYREG_PERI_MS_PPU_FX342_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015D84UL)
#define CYREG_PERI_MS_PPU_FX342_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015D90UL)
#define CYREG_PERI_MS_PPU_FX342_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015D94UL)
#define CYREG_PERI_MS_PPU_FX342_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015D98UL)
#define CYREG_PERI_MS_PPU_FX342_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015D9CUL)
#define CYREG_PERI_MS_PPU_FX342_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015DA0UL)
#define CYREG_PERI_MS_PPU_FX342_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015DA4UL)
#define CYREG_PERI_MS_PPU_FX342_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015DB0UL)
#define CYREG_PERI_MS_PPU_FX342_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015DB4UL)
#define CYREG_PERI_MS_PPU_FX342_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015DB8UL)
#define CYREG_PERI_MS_PPU_FX342_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX343)
  */
#define CYREG_PERI_MS_PPU_FX343_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015DC0UL)
#define CYREG_PERI_MS_PPU_FX343_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015DC4UL)
#define CYREG_PERI_MS_PPU_FX343_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015DD0UL)
#define CYREG_PERI_MS_PPU_FX343_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015DD4UL)
#define CYREG_PERI_MS_PPU_FX343_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015DD8UL)
#define CYREG_PERI_MS_PPU_FX343_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015DDCUL)
#define CYREG_PERI_MS_PPU_FX343_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015DE0UL)
#define CYREG_PERI_MS_PPU_FX343_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015DE4UL)
#define CYREG_PERI_MS_PPU_FX343_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015DF0UL)
#define CYREG_PERI_MS_PPU_FX343_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015DF4UL)
#define CYREG_PERI_MS_PPU_FX343_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015DF8UL)
#define CYREG_PERI_MS_PPU_FX343_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX344)
  */
#define CYREG_PERI_MS_PPU_FX344_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015E00UL)
#define CYREG_PERI_MS_PPU_FX344_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015E04UL)
#define CYREG_PERI_MS_PPU_FX344_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015E10UL)
#define CYREG_PERI_MS_PPU_FX344_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015E14UL)
#define CYREG_PERI_MS_PPU_FX344_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015E18UL)
#define CYREG_PERI_MS_PPU_FX344_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015E1CUL)
#define CYREG_PERI_MS_PPU_FX344_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015E20UL)
#define CYREG_PERI_MS_PPU_FX344_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015E24UL)
#define CYREG_PERI_MS_PPU_FX344_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015E30UL)
#define CYREG_PERI_MS_PPU_FX344_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015E34UL)
#define CYREG_PERI_MS_PPU_FX344_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015E38UL)
#define CYREG_PERI_MS_PPU_FX344_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX345)
  */
#define CYREG_PERI_MS_PPU_FX345_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015E40UL)
#define CYREG_PERI_MS_PPU_FX345_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015E44UL)
#define CYREG_PERI_MS_PPU_FX345_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015E50UL)
#define CYREG_PERI_MS_PPU_FX345_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015E54UL)
#define CYREG_PERI_MS_PPU_FX345_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015E58UL)
#define CYREG_PERI_MS_PPU_FX345_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015E5CUL)
#define CYREG_PERI_MS_PPU_FX345_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015E60UL)
#define CYREG_PERI_MS_PPU_FX345_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015E64UL)
#define CYREG_PERI_MS_PPU_FX345_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015E70UL)
#define CYREG_PERI_MS_PPU_FX345_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015E74UL)
#define CYREG_PERI_MS_PPU_FX345_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015E78UL)
#define CYREG_PERI_MS_PPU_FX345_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX346)
  */
#define CYREG_PERI_MS_PPU_FX346_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015E80UL)
#define CYREG_PERI_MS_PPU_FX346_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015E84UL)
#define CYREG_PERI_MS_PPU_FX346_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015E90UL)
#define CYREG_PERI_MS_PPU_FX346_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015E94UL)
#define CYREG_PERI_MS_PPU_FX346_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015E98UL)
#define CYREG_PERI_MS_PPU_FX346_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015E9CUL)
#define CYREG_PERI_MS_PPU_FX346_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015EA0UL)
#define CYREG_PERI_MS_PPU_FX346_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015EA4UL)
#define CYREG_PERI_MS_PPU_FX346_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015EB0UL)
#define CYREG_PERI_MS_PPU_FX346_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015EB4UL)
#define CYREG_PERI_MS_PPU_FX346_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015EB8UL)
#define CYREG_PERI_MS_PPU_FX346_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX347)
  */
#define CYREG_PERI_MS_PPU_FX347_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015EC0UL)
#define CYREG_PERI_MS_PPU_FX347_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015EC4UL)
#define CYREG_PERI_MS_PPU_FX347_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015ED0UL)
#define CYREG_PERI_MS_PPU_FX347_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015ED4UL)
#define CYREG_PERI_MS_PPU_FX347_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015ED8UL)
#define CYREG_PERI_MS_PPU_FX347_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015EDCUL)
#define CYREG_PERI_MS_PPU_FX347_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015EE0UL)
#define CYREG_PERI_MS_PPU_FX347_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015EE4UL)
#define CYREG_PERI_MS_PPU_FX347_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015EF0UL)
#define CYREG_PERI_MS_PPU_FX347_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015EF4UL)
#define CYREG_PERI_MS_PPU_FX347_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015EF8UL)
#define CYREG_PERI_MS_PPU_FX347_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX348)
  */
#define CYREG_PERI_MS_PPU_FX348_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015F00UL)
#define CYREG_PERI_MS_PPU_FX348_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015F04UL)
#define CYREG_PERI_MS_PPU_FX348_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015F10UL)
#define CYREG_PERI_MS_PPU_FX348_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015F14UL)
#define CYREG_PERI_MS_PPU_FX348_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015F18UL)
#define CYREG_PERI_MS_PPU_FX348_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015F1CUL)
#define CYREG_PERI_MS_PPU_FX348_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015F20UL)
#define CYREG_PERI_MS_PPU_FX348_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015F24UL)
#define CYREG_PERI_MS_PPU_FX348_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015F30UL)
#define CYREG_PERI_MS_PPU_FX348_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015F34UL)
#define CYREG_PERI_MS_PPU_FX348_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015F38UL)
#define CYREG_PERI_MS_PPU_FX348_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX349)
  */
#define CYREG_PERI_MS_PPU_FX349_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015F40UL)
#define CYREG_PERI_MS_PPU_FX349_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015F44UL)
#define CYREG_PERI_MS_PPU_FX349_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015F50UL)
#define CYREG_PERI_MS_PPU_FX349_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015F54UL)
#define CYREG_PERI_MS_PPU_FX349_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015F58UL)
#define CYREG_PERI_MS_PPU_FX349_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015F5CUL)
#define CYREG_PERI_MS_PPU_FX349_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015F60UL)
#define CYREG_PERI_MS_PPU_FX349_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015F64UL)
#define CYREG_PERI_MS_PPU_FX349_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015F70UL)
#define CYREG_PERI_MS_PPU_FX349_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015F74UL)
#define CYREG_PERI_MS_PPU_FX349_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015F78UL)
#define CYREG_PERI_MS_PPU_FX349_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX350)
  */
#define CYREG_PERI_MS_PPU_FX350_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015F80UL)
#define CYREG_PERI_MS_PPU_FX350_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015F84UL)
#define CYREG_PERI_MS_PPU_FX350_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015F90UL)
#define CYREG_PERI_MS_PPU_FX350_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015F94UL)
#define CYREG_PERI_MS_PPU_FX350_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015F98UL)
#define CYREG_PERI_MS_PPU_FX350_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015F9CUL)
#define CYREG_PERI_MS_PPU_FX350_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015FA0UL)
#define CYREG_PERI_MS_PPU_FX350_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015FA4UL)
#define CYREG_PERI_MS_PPU_FX350_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015FB0UL)
#define CYREG_PERI_MS_PPU_FX350_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015FB4UL)
#define CYREG_PERI_MS_PPU_FX350_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015FB8UL)
#define CYREG_PERI_MS_PPU_FX350_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX351)
  */
#define CYREG_PERI_MS_PPU_FX351_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40015FC0UL)
#define CYREG_PERI_MS_PPU_FX351_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40015FC4UL)
#define CYREG_PERI_MS_PPU_FX351_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40015FD0UL)
#define CYREG_PERI_MS_PPU_FX351_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40015FD4UL)
#define CYREG_PERI_MS_PPU_FX351_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40015FD8UL)
#define CYREG_PERI_MS_PPU_FX351_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40015FDCUL)
#define CYREG_PERI_MS_PPU_FX351_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40015FE0UL)
#define CYREG_PERI_MS_PPU_FX351_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40015FE4UL)
#define CYREG_PERI_MS_PPU_FX351_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40015FF0UL)
#define CYREG_PERI_MS_PPU_FX351_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40015FF4UL)
#define CYREG_PERI_MS_PPU_FX351_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40015FF8UL)
#define CYREG_PERI_MS_PPU_FX351_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40015FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX352)
  */
#define CYREG_PERI_MS_PPU_FX352_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016000UL)
#define CYREG_PERI_MS_PPU_FX352_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016004UL)
#define CYREG_PERI_MS_PPU_FX352_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016010UL)
#define CYREG_PERI_MS_PPU_FX352_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016014UL)
#define CYREG_PERI_MS_PPU_FX352_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016018UL)
#define CYREG_PERI_MS_PPU_FX352_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001601CUL)
#define CYREG_PERI_MS_PPU_FX352_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016020UL)
#define CYREG_PERI_MS_PPU_FX352_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016024UL)
#define CYREG_PERI_MS_PPU_FX352_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016030UL)
#define CYREG_PERI_MS_PPU_FX352_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016034UL)
#define CYREG_PERI_MS_PPU_FX352_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016038UL)
#define CYREG_PERI_MS_PPU_FX352_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001603CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX353)
  */
#define CYREG_PERI_MS_PPU_FX353_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016040UL)
#define CYREG_PERI_MS_PPU_FX353_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016044UL)
#define CYREG_PERI_MS_PPU_FX353_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016050UL)
#define CYREG_PERI_MS_PPU_FX353_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016054UL)
#define CYREG_PERI_MS_PPU_FX353_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016058UL)
#define CYREG_PERI_MS_PPU_FX353_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001605CUL)
#define CYREG_PERI_MS_PPU_FX353_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016060UL)
#define CYREG_PERI_MS_PPU_FX353_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016064UL)
#define CYREG_PERI_MS_PPU_FX353_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016070UL)
#define CYREG_PERI_MS_PPU_FX353_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016074UL)
#define CYREG_PERI_MS_PPU_FX353_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016078UL)
#define CYREG_PERI_MS_PPU_FX353_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001607CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX354)
  */
#define CYREG_PERI_MS_PPU_FX354_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016080UL)
#define CYREG_PERI_MS_PPU_FX354_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016084UL)
#define CYREG_PERI_MS_PPU_FX354_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016090UL)
#define CYREG_PERI_MS_PPU_FX354_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016094UL)
#define CYREG_PERI_MS_PPU_FX354_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016098UL)
#define CYREG_PERI_MS_PPU_FX354_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001609CUL)
#define CYREG_PERI_MS_PPU_FX354_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400160A0UL)
#define CYREG_PERI_MS_PPU_FX354_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400160A4UL)
#define CYREG_PERI_MS_PPU_FX354_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400160B0UL)
#define CYREG_PERI_MS_PPU_FX354_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400160B4UL)
#define CYREG_PERI_MS_PPU_FX354_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400160B8UL)
#define CYREG_PERI_MS_PPU_FX354_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400160BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX355)
  */
#define CYREG_PERI_MS_PPU_FX355_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400160C0UL)
#define CYREG_PERI_MS_PPU_FX355_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400160C4UL)
#define CYREG_PERI_MS_PPU_FX355_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400160D0UL)
#define CYREG_PERI_MS_PPU_FX355_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400160D4UL)
#define CYREG_PERI_MS_PPU_FX355_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400160D8UL)
#define CYREG_PERI_MS_PPU_FX355_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400160DCUL)
#define CYREG_PERI_MS_PPU_FX355_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400160E0UL)
#define CYREG_PERI_MS_PPU_FX355_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400160E4UL)
#define CYREG_PERI_MS_PPU_FX355_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400160F0UL)
#define CYREG_PERI_MS_PPU_FX355_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400160F4UL)
#define CYREG_PERI_MS_PPU_FX355_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400160F8UL)
#define CYREG_PERI_MS_PPU_FX355_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400160FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX356)
  */
#define CYREG_PERI_MS_PPU_FX356_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016100UL)
#define CYREG_PERI_MS_PPU_FX356_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016104UL)
#define CYREG_PERI_MS_PPU_FX356_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016110UL)
#define CYREG_PERI_MS_PPU_FX356_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016114UL)
#define CYREG_PERI_MS_PPU_FX356_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016118UL)
#define CYREG_PERI_MS_PPU_FX356_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001611CUL)
#define CYREG_PERI_MS_PPU_FX356_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016120UL)
#define CYREG_PERI_MS_PPU_FX356_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016124UL)
#define CYREG_PERI_MS_PPU_FX356_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016130UL)
#define CYREG_PERI_MS_PPU_FX356_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016134UL)
#define CYREG_PERI_MS_PPU_FX356_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016138UL)
#define CYREG_PERI_MS_PPU_FX356_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001613CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX357)
  */
#define CYREG_PERI_MS_PPU_FX357_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016140UL)
#define CYREG_PERI_MS_PPU_FX357_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016144UL)
#define CYREG_PERI_MS_PPU_FX357_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016150UL)
#define CYREG_PERI_MS_PPU_FX357_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016154UL)
#define CYREG_PERI_MS_PPU_FX357_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016158UL)
#define CYREG_PERI_MS_PPU_FX357_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001615CUL)
#define CYREG_PERI_MS_PPU_FX357_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016160UL)
#define CYREG_PERI_MS_PPU_FX357_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016164UL)
#define CYREG_PERI_MS_PPU_FX357_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016170UL)
#define CYREG_PERI_MS_PPU_FX357_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016174UL)
#define CYREG_PERI_MS_PPU_FX357_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016178UL)
#define CYREG_PERI_MS_PPU_FX357_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001617CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX358)
  */
#define CYREG_PERI_MS_PPU_FX358_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016180UL)
#define CYREG_PERI_MS_PPU_FX358_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016184UL)
#define CYREG_PERI_MS_PPU_FX358_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016190UL)
#define CYREG_PERI_MS_PPU_FX358_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016194UL)
#define CYREG_PERI_MS_PPU_FX358_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016198UL)
#define CYREG_PERI_MS_PPU_FX358_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001619CUL)
#define CYREG_PERI_MS_PPU_FX358_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400161A0UL)
#define CYREG_PERI_MS_PPU_FX358_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400161A4UL)
#define CYREG_PERI_MS_PPU_FX358_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400161B0UL)
#define CYREG_PERI_MS_PPU_FX358_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400161B4UL)
#define CYREG_PERI_MS_PPU_FX358_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400161B8UL)
#define CYREG_PERI_MS_PPU_FX358_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400161BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX359)
  */
#define CYREG_PERI_MS_PPU_FX359_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400161C0UL)
#define CYREG_PERI_MS_PPU_FX359_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400161C4UL)
#define CYREG_PERI_MS_PPU_FX359_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400161D0UL)
#define CYREG_PERI_MS_PPU_FX359_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400161D4UL)
#define CYREG_PERI_MS_PPU_FX359_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400161D8UL)
#define CYREG_PERI_MS_PPU_FX359_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400161DCUL)
#define CYREG_PERI_MS_PPU_FX359_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400161E0UL)
#define CYREG_PERI_MS_PPU_FX359_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400161E4UL)
#define CYREG_PERI_MS_PPU_FX359_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400161F0UL)
#define CYREG_PERI_MS_PPU_FX359_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400161F4UL)
#define CYREG_PERI_MS_PPU_FX359_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400161F8UL)
#define CYREG_PERI_MS_PPU_FX359_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400161FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX360)
  */
#define CYREG_PERI_MS_PPU_FX360_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016200UL)
#define CYREG_PERI_MS_PPU_FX360_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016204UL)
#define CYREG_PERI_MS_PPU_FX360_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016210UL)
#define CYREG_PERI_MS_PPU_FX360_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016214UL)
#define CYREG_PERI_MS_PPU_FX360_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016218UL)
#define CYREG_PERI_MS_PPU_FX360_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001621CUL)
#define CYREG_PERI_MS_PPU_FX360_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016220UL)
#define CYREG_PERI_MS_PPU_FX360_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016224UL)
#define CYREG_PERI_MS_PPU_FX360_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016230UL)
#define CYREG_PERI_MS_PPU_FX360_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016234UL)
#define CYREG_PERI_MS_PPU_FX360_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016238UL)
#define CYREG_PERI_MS_PPU_FX360_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001623CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX361)
  */
#define CYREG_PERI_MS_PPU_FX361_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016240UL)
#define CYREG_PERI_MS_PPU_FX361_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016244UL)
#define CYREG_PERI_MS_PPU_FX361_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016250UL)
#define CYREG_PERI_MS_PPU_FX361_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016254UL)
#define CYREG_PERI_MS_PPU_FX361_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016258UL)
#define CYREG_PERI_MS_PPU_FX361_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001625CUL)
#define CYREG_PERI_MS_PPU_FX361_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016260UL)
#define CYREG_PERI_MS_PPU_FX361_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016264UL)
#define CYREG_PERI_MS_PPU_FX361_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016270UL)
#define CYREG_PERI_MS_PPU_FX361_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016274UL)
#define CYREG_PERI_MS_PPU_FX361_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016278UL)
#define CYREG_PERI_MS_PPU_FX361_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001627CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX362)
  */
#define CYREG_PERI_MS_PPU_FX362_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016280UL)
#define CYREG_PERI_MS_PPU_FX362_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016284UL)
#define CYREG_PERI_MS_PPU_FX362_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016290UL)
#define CYREG_PERI_MS_PPU_FX362_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016294UL)
#define CYREG_PERI_MS_PPU_FX362_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016298UL)
#define CYREG_PERI_MS_PPU_FX362_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001629CUL)
#define CYREG_PERI_MS_PPU_FX362_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400162A0UL)
#define CYREG_PERI_MS_PPU_FX362_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400162A4UL)
#define CYREG_PERI_MS_PPU_FX362_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400162B0UL)
#define CYREG_PERI_MS_PPU_FX362_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400162B4UL)
#define CYREG_PERI_MS_PPU_FX362_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400162B8UL)
#define CYREG_PERI_MS_PPU_FX362_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400162BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX363)
  */
#define CYREG_PERI_MS_PPU_FX363_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400162C0UL)
#define CYREG_PERI_MS_PPU_FX363_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400162C4UL)
#define CYREG_PERI_MS_PPU_FX363_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400162D0UL)
#define CYREG_PERI_MS_PPU_FX363_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400162D4UL)
#define CYREG_PERI_MS_PPU_FX363_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400162D8UL)
#define CYREG_PERI_MS_PPU_FX363_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400162DCUL)
#define CYREG_PERI_MS_PPU_FX363_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400162E0UL)
#define CYREG_PERI_MS_PPU_FX363_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400162E4UL)
#define CYREG_PERI_MS_PPU_FX363_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400162F0UL)
#define CYREG_PERI_MS_PPU_FX363_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400162F4UL)
#define CYREG_PERI_MS_PPU_FX363_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400162F8UL)
#define CYREG_PERI_MS_PPU_FX363_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400162FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX364)
  */
#define CYREG_PERI_MS_PPU_FX364_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016300UL)
#define CYREG_PERI_MS_PPU_FX364_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016304UL)
#define CYREG_PERI_MS_PPU_FX364_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016310UL)
#define CYREG_PERI_MS_PPU_FX364_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016314UL)
#define CYREG_PERI_MS_PPU_FX364_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016318UL)
#define CYREG_PERI_MS_PPU_FX364_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001631CUL)
#define CYREG_PERI_MS_PPU_FX364_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016320UL)
#define CYREG_PERI_MS_PPU_FX364_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016324UL)
#define CYREG_PERI_MS_PPU_FX364_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016330UL)
#define CYREG_PERI_MS_PPU_FX364_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016334UL)
#define CYREG_PERI_MS_PPU_FX364_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016338UL)
#define CYREG_PERI_MS_PPU_FX364_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001633CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX365)
  */
#define CYREG_PERI_MS_PPU_FX365_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016340UL)
#define CYREG_PERI_MS_PPU_FX365_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016344UL)
#define CYREG_PERI_MS_PPU_FX365_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016350UL)
#define CYREG_PERI_MS_PPU_FX365_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016354UL)
#define CYREG_PERI_MS_PPU_FX365_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016358UL)
#define CYREG_PERI_MS_PPU_FX365_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001635CUL)
#define CYREG_PERI_MS_PPU_FX365_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016360UL)
#define CYREG_PERI_MS_PPU_FX365_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016364UL)
#define CYREG_PERI_MS_PPU_FX365_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016370UL)
#define CYREG_PERI_MS_PPU_FX365_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016374UL)
#define CYREG_PERI_MS_PPU_FX365_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016378UL)
#define CYREG_PERI_MS_PPU_FX365_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001637CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX366)
  */
#define CYREG_PERI_MS_PPU_FX366_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016380UL)
#define CYREG_PERI_MS_PPU_FX366_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016384UL)
#define CYREG_PERI_MS_PPU_FX366_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016390UL)
#define CYREG_PERI_MS_PPU_FX366_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016394UL)
#define CYREG_PERI_MS_PPU_FX366_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016398UL)
#define CYREG_PERI_MS_PPU_FX366_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001639CUL)
#define CYREG_PERI_MS_PPU_FX366_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400163A0UL)
#define CYREG_PERI_MS_PPU_FX366_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400163A4UL)
#define CYREG_PERI_MS_PPU_FX366_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400163B0UL)
#define CYREG_PERI_MS_PPU_FX366_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400163B4UL)
#define CYREG_PERI_MS_PPU_FX366_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400163B8UL)
#define CYREG_PERI_MS_PPU_FX366_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400163BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX367)
  */
#define CYREG_PERI_MS_PPU_FX367_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400163C0UL)
#define CYREG_PERI_MS_PPU_FX367_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400163C4UL)
#define CYREG_PERI_MS_PPU_FX367_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400163D0UL)
#define CYREG_PERI_MS_PPU_FX367_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400163D4UL)
#define CYREG_PERI_MS_PPU_FX367_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400163D8UL)
#define CYREG_PERI_MS_PPU_FX367_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400163DCUL)
#define CYREG_PERI_MS_PPU_FX367_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400163E0UL)
#define CYREG_PERI_MS_PPU_FX367_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400163E4UL)
#define CYREG_PERI_MS_PPU_FX367_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400163F0UL)
#define CYREG_PERI_MS_PPU_FX367_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400163F4UL)
#define CYREG_PERI_MS_PPU_FX367_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400163F8UL)
#define CYREG_PERI_MS_PPU_FX367_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400163FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX368)
  */
#define CYREG_PERI_MS_PPU_FX368_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016400UL)
#define CYREG_PERI_MS_PPU_FX368_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016404UL)
#define CYREG_PERI_MS_PPU_FX368_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016410UL)
#define CYREG_PERI_MS_PPU_FX368_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016414UL)
#define CYREG_PERI_MS_PPU_FX368_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016418UL)
#define CYREG_PERI_MS_PPU_FX368_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001641CUL)
#define CYREG_PERI_MS_PPU_FX368_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016420UL)
#define CYREG_PERI_MS_PPU_FX368_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016424UL)
#define CYREG_PERI_MS_PPU_FX368_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016430UL)
#define CYREG_PERI_MS_PPU_FX368_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016434UL)
#define CYREG_PERI_MS_PPU_FX368_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016438UL)
#define CYREG_PERI_MS_PPU_FX368_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001643CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX369)
  */
#define CYREG_PERI_MS_PPU_FX369_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016440UL)
#define CYREG_PERI_MS_PPU_FX369_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016444UL)
#define CYREG_PERI_MS_PPU_FX369_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016450UL)
#define CYREG_PERI_MS_PPU_FX369_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016454UL)
#define CYREG_PERI_MS_PPU_FX369_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016458UL)
#define CYREG_PERI_MS_PPU_FX369_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001645CUL)
#define CYREG_PERI_MS_PPU_FX369_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016460UL)
#define CYREG_PERI_MS_PPU_FX369_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016464UL)
#define CYREG_PERI_MS_PPU_FX369_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016470UL)
#define CYREG_PERI_MS_PPU_FX369_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016474UL)
#define CYREG_PERI_MS_PPU_FX369_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016478UL)
#define CYREG_PERI_MS_PPU_FX369_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001647CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX370)
  */
#define CYREG_PERI_MS_PPU_FX370_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016480UL)
#define CYREG_PERI_MS_PPU_FX370_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016484UL)
#define CYREG_PERI_MS_PPU_FX370_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016490UL)
#define CYREG_PERI_MS_PPU_FX370_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016494UL)
#define CYREG_PERI_MS_PPU_FX370_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016498UL)
#define CYREG_PERI_MS_PPU_FX370_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001649CUL)
#define CYREG_PERI_MS_PPU_FX370_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400164A0UL)
#define CYREG_PERI_MS_PPU_FX370_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400164A4UL)
#define CYREG_PERI_MS_PPU_FX370_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400164B0UL)
#define CYREG_PERI_MS_PPU_FX370_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400164B4UL)
#define CYREG_PERI_MS_PPU_FX370_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400164B8UL)
#define CYREG_PERI_MS_PPU_FX370_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400164BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX371)
  */
#define CYREG_PERI_MS_PPU_FX371_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400164C0UL)
#define CYREG_PERI_MS_PPU_FX371_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400164C4UL)
#define CYREG_PERI_MS_PPU_FX371_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400164D0UL)
#define CYREG_PERI_MS_PPU_FX371_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400164D4UL)
#define CYREG_PERI_MS_PPU_FX371_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400164D8UL)
#define CYREG_PERI_MS_PPU_FX371_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400164DCUL)
#define CYREG_PERI_MS_PPU_FX371_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400164E0UL)
#define CYREG_PERI_MS_PPU_FX371_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400164E4UL)
#define CYREG_PERI_MS_PPU_FX371_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400164F0UL)
#define CYREG_PERI_MS_PPU_FX371_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400164F4UL)
#define CYREG_PERI_MS_PPU_FX371_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400164F8UL)
#define CYREG_PERI_MS_PPU_FX371_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400164FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX372)
  */
#define CYREG_PERI_MS_PPU_FX372_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016500UL)
#define CYREG_PERI_MS_PPU_FX372_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016504UL)
#define CYREG_PERI_MS_PPU_FX372_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016510UL)
#define CYREG_PERI_MS_PPU_FX372_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016514UL)
#define CYREG_PERI_MS_PPU_FX372_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016518UL)
#define CYREG_PERI_MS_PPU_FX372_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001651CUL)
#define CYREG_PERI_MS_PPU_FX372_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016520UL)
#define CYREG_PERI_MS_PPU_FX372_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016524UL)
#define CYREG_PERI_MS_PPU_FX372_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016530UL)
#define CYREG_PERI_MS_PPU_FX372_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016534UL)
#define CYREG_PERI_MS_PPU_FX372_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016538UL)
#define CYREG_PERI_MS_PPU_FX372_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001653CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX373)
  */
#define CYREG_PERI_MS_PPU_FX373_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016540UL)
#define CYREG_PERI_MS_PPU_FX373_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016544UL)
#define CYREG_PERI_MS_PPU_FX373_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016550UL)
#define CYREG_PERI_MS_PPU_FX373_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016554UL)
#define CYREG_PERI_MS_PPU_FX373_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016558UL)
#define CYREG_PERI_MS_PPU_FX373_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001655CUL)
#define CYREG_PERI_MS_PPU_FX373_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016560UL)
#define CYREG_PERI_MS_PPU_FX373_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016564UL)
#define CYREG_PERI_MS_PPU_FX373_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016570UL)
#define CYREG_PERI_MS_PPU_FX373_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016574UL)
#define CYREG_PERI_MS_PPU_FX373_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016578UL)
#define CYREG_PERI_MS_PPU_FX373_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001657CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX374)
  */
#define CYREG_PERI_MS_PPU_FX374_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016580UL)
#define CYREG_PERI_MS_PPU_FX374_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016584UL)
#define CYREG_PERI_MS_PPU_FX374_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016590UL)
#define CYREG_PERI_MS_PPU_FX374_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016594UL)
#define CYREG_PERI_MS_PPU_FX374_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016598UL)
#define CYREG_PERI_MS_PPU_FX374_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001659CUL)
#define CYREG_PERI_MS_PPU_FX374_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400165A0UL)
#define CYREG_PERI_MS_PPU_FX374_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400165A4UL)
#define CYREG_PERI_MS_PPU_FX374_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400165B0UL)
#define CYREG_PERI_MS_PPU_FX374_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400165B4UL)
#define CYREG_PERI_MS_PPU_FX374_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400165B8UL)
#define CYREG_PERI_MS_PPU_FX374_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400165BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX375)
  */
#define CYREG_PERI_MS_PPU_FX375_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400165C0UL)
#define CYREG_PERI_MS_PPU_FX375_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400165C4UL)
#define CYREG_PERI_MS_PPU_FX375_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400165D0UL)
#define CYREG_PERI_MS_PPU_FX375_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400165D4UL)
#define CYREG_PERI_MS_PPU_FX375_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400165D8UL)
#define CYREG_PERI_MS_PPU_FX375_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400165DCUL)
#define CYREG_PERI_MS_PPU_FX375_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400165E0UL)
#define CYREG_PERI_MS_PPU_FX375_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400165E4UL)
#define CYREG_PERI_MS_PPU_FX375_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400165F0UL)
#define CYREG_PERI_MS_PPU_FX375_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400165F4UL)
#define CYREG_PERI_MS_PPU_FX375_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400165F8UL)
#define CYREG_PERI_MS_PPU_FX375_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400165FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX376)
  */
#define CYREG_PERI_MS_PPU_FX376_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016600UL)
#define CYREG_PERI_MS_PPU_FX376_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016604UL)
#define CYREG_PERI_MS_PPU_FX376_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016610UL)
#define CYREG_PERI_MS_PPU_FX376_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016614UL)
#define CYREG_PERI_MS_PPU_FX376_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016618UL)
#define CYREG_PERI_MS_PPU_FX376_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001661CUL)
#define CYREG_PERI_MS_PPU_FX376_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016620UL)
#define CYREG_PERI_MS_PPU_FX376_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016624UL)
#define CYREG_PERI_MS_PPU_FX376_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016630UL)
#define CYREG_PERI_MS_PPU_FX376_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016634UL)
#define CYREG_PERI_MS_PPU_FX376_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016638UL)
#define CYREG_PERI_MS_PPU_FX376_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001663CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX377)
  */
#define CYREG_PERI_MS_PPU_FX377_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016640UL)
#define CYREG_PERI_MS_PPU_FX377_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016644UL)
#define CYREG_PERI_MS_PPU_FX377_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016650UL)
#define CYREG_PERI_MS_PPU_FX377_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016654UL)
#define CYREG_PERI_MS_PPU_FX377_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016658UL)
#define CYREG_PERI_MS_PPU_FX377_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001665CUL)
#define CYREG_PERI_MS_PPU_FX377_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016660UL)
#define CYREG_PERI_MS_PPU_FX377_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016664UL)
#define CYREG_PERI_MS_PPU_FX377_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016670UL)
#define CYREG_PERI_MS_PPU_FX377_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016674UL)
#define CYREG_PERI_MS_PPU_FX377_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016678UL)
#define CYREG_PERI_MS_PPU_FX377_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001667CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX378)
  */
#define CYREG_PERI_MS_PPU_FX378_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016680UL)
#define CYREG_PERI_MS_PPU_FX378_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016684UL)
#define CYREG_PERI_MS_PPU_FX378_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016690UL)
#define CYREG_PERI_MS_PPU_FX378_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016694UL)
#define CYREG_PERI_MS_PPU_FX378_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016698UL)
#define CYREG_PERI_MS_PPU_FX378_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001669CUL)
#define CYREG_PERI_MS_PPU_FX378_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400166A0UL)
#define CYREG_PERI_MS_PPU_FX378_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400166A4UL)
#define CYREG_PERI_MS_PPU_FX378_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400166B0UL)
#define CYREG_PERI_MS_PPU_FX378_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400166B4UL)
#define CYREG_PERI_MS_PPU_FX378_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400166B8UL)
#define CYREG_PERI_MS_PPU_FX378_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400166BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX379)
  */
#define CYREG_PERI_MS_PPU_FX379_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400166C0UL)
#define CYREG_PERI_MS_PPU_FX379_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400166C4UL)
#define CYREG_PERI_MS_PPU_FX379_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400166D0UL)
#define CYREG_PERI_MS_PPU_FX379_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400166D4UL)
#define CYREG_PERI_MS_PPU_FX379_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400166D8UL)
#define CYREG_PERI_MS_PPU_FX379_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400166DCUL)
#define CYREG_PERI_MS_PPU_FX379_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400166E0UL)
#define CYREG_PERI_MS_PPU_FX379_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400166E4UL)
#define CYREG_PERI_MS_PPU_FX379_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400166F0UL)
#define CYREG_PERI_MS_PPU_FX379_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400166F4UL)
#define CYREG_PERI_MS_PPU_FX379_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400166F8UL)
#define CYREG_PERI_MS_PPU_FX379_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400166FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX380)
  */
#define CYREG_PERI_MS_PPU_FX380_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016700UL)
#define CYREG_PERI_MS_PPU_FX380_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016704UL)
#define CYREG_PERI_MS_PPU_FX380_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016710UL)
#define CYREG_PERI_MS_PPU_FX380_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016714UL)
#define CYREG_PERI_MS_PPU_FX380_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016718UL)
#define CYREG_PERI_MS_PPU_FX380_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001671CUL)
#define CYREG_PERI_MS_PPU_FX380_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016720UL)
#define CYREG_PERI_MS_PPU_FX380_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016724UL)
#define CYREG_PERI_MS_PPU_FX380_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016730UL)
#define CYREG_PERI_MS_PPU_FX380_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016734UL)
#define CYREG_PERI_MS_PPU_FX380_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016738UL)
#define CYREG_PERI_MS_PPU_FX380_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001673CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX381)
  */
#define CYREG_PERI_MS_PPU_FX381_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016740UL)
#define CYREG_PERI_MS_PPU_FX381_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016744UL)
#define CYREG_PERI_MS_PPU_FX381_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016750UL)
#define CYREG_PERI_MS_PPU_FX381_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016754UL)
#define CYREG_PERI_MS_PPU_FX381_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016758UL)
#define CYREG_PERI_MS_PPU_FX381_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001675CUL)
#define CYREG_PERI_MS_PPU_FX381_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016760UL)
#define CYREG_PERI_MS_PPU_FX381_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016764UL)
#define CYREG_PERI_MS_PPU_FX381_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016770UL)
#define CYREG_PERI_MS_PPU_FX381_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016774UL)
#define CYREG_PERI_MS_PPU_FX381_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016778UL)
#define CYREG_PERI_MS_PPU_FX381_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001677CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX382)
  */
#define CYREG_PERI_MS_PPU_FX382_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016780UL)
#define CYREG_PERI_MS_PPU_FX382_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016784UL)
#define CYREG_PERI_MS_PPU_FX382_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016790UL)
#define CYREG_PERI_MS_PPU_FX382_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016794UL)
#define CYREG_PERI_MS_PPU_FX382_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016798UL)
#define CYREG_PERI_MS_PPU_FX382_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001679CUL)
#define CYREG_PERI_MS_PPU_FX382_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400167A0UL)
#define CYREG_PERI_MS_PPU_FX382_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400167A4UL)
#define CYREG_PERI_MS_PPU_FX382_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400167B0UL)
#define CYREG_PERI_MS_PPU_FX382_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400167B4UL)
#define CYREG_PERI_MS_PPU_FX382_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400167B8UL)
#define CYREG_PERI_MS_PPU_FX382_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400167BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX383)
  */
#define CYREG_PERI_MS_PPU_FX383_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400167C0UL)
#define CYREG_PERI_MS_PPU_FX383_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400167C4UL)
#define CYREG_PERI_MS_PPU_FX383_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400167D0UL)
#define CYREG_PERI_MS_PPU_FX383_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400167D4UL)
#define CYREG_PERI_MS_PPU_FX383_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400167D8UL)
#define CYREG_PERI_MS_PPU_FX383_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400167DCUL)
#define CYREG_PERI_MS_PPU_FX383_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400167E0UL)
#define CYREG_PERI_MS_PPU_FX383_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400167E4UL)
#define CYREG_PERI_MS_PPU_FX383_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400167F0UL)
#define CYREG_PERI_MS_PPU_FX383_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400167F4UL)
#define CYREG_PERI_MS_PPU_FX383_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400167F8UL)
#define CYREG_PERI_MS_PPU_FX383_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400167FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX384)
  */
#define CYREG_PERI_MS_PPU_FX384_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016800UL)
#define CYREG_PERI_MS_PPU_FX384_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016804UL)
#define CYREG_PERI_MS_PPU_FX384_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016810UL)
#define CYREG_PERI_MS_PPU_FX384_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016814UL)
#define CYREG_PERI_MS_PPU_FX384_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016818UL)
#define CYREG_PERI_MS_PPU_FX384_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001681CUL)
#define CYREG_PERI_MS_PPU_FX384_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016820UL)
#define CYREG_PERI_MS_PPU_FX384_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016824UL)
#define CYREG_PERI_MS_PPU_FX384_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016830UL)
#define CYREG_PERI_MS_PPU_FX384_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016834UL)
#define CYREG_PERI_MS_PPU_FX384_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016838UL)
#define CYREG_PERI_MS_PPU_FX384_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001683CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX385)
  */
#define CYREG_PERI_MS_PPU_FX385_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016840UL)
#define CYREG_PERI_MS_PPU_FX385_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016844UL)
#define CYREG_PERI_MS_PPU_FX385_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016850UL)
#define CYREG_PERI_MS_PPU_FX385_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016854UL)
#define CYREG_PERI_MS_PPU_FX385_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016858UL)
#define CYREG_PERI_MS_PPU_FX385_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001685CUL)
#define CYREG_PERI_MS_PPU_FX385_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016860UL)
#define CYREG_PERI_MS_PPU_FX385_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016864UL)
#define CYREG_PERI_MS_PPU_FX385_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016870UL)
#define CYREG_PERI_MS_PPU_FX385_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016874UL)
#define CYREG_PERI_MS_PPU_FX385_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016878UL)
#define CYREG_PERI_MS_PPU_FX385_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001687CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX386)
  */
#define CYREG_PERI_MS_PPU_FX386_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016880UL)
#define CYREG_PERI_MS_PPU_FX386_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016884UL)
#define CYREG_PERI_MS_PPU_FX386_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016890UL)
#define CYREG_PERI_MS_PPU_FX386_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016894UL)
#define CYREG_PERI_MS_PPU_FX386_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016898UL)
#define CYREG_PERI_MS_PPU_FX386_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001689CUL)
#define CYREG_PERI_MS_PPU_FX386_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400168A0UL)
#define CYREG_PERI_MS_PPU_FX386_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400168A4UL)
#define CYREG_PERI_MS_PPU_FX386_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400168B0UL)
#define CYREG_PERI_MS_PPU_FX386_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400168B4UL)
#define CYREG_PERI_MS_PPU_FX386_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400168B8UL)
#define CYREG_PERI_MS_PPU_FX386_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400168BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX387)
  */
#define CYREG_PERI_MS_PPU_FX387_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400168C0UL)
#define CYREG_PERI_MS_PPU_FX387_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400168C4UL)
#define CYREG_PERI_MS_PPU_FX387_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400168D0UL)
#define CYREG_PERI_MS_PPU_FX387_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400168D4UL)
#define CYREG_PERI_MS_PPU_FX387_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400168D8UL)
#define CYREG_PERI_MS_PPU_FX387_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400168DCUL)
#define CYREG_PERI_MS_PPU_FX387_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400168E0UL)
#define CYREG_PERI_MS_PPU_FX387_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400168E4UL)
#define CYREG_PERI_MS_PPU_FX387_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400168F0UL)
#define CYREG_PERI_MS_PPU_FX387_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400168F4UL)
#define CYREG_PERI_MS_PPU_FX387_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400168F8UL)
#define CYREG_PERI_MS_PPU_FX387_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400168FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX388)
  */
#define CYREG_PERI_MS_PPU_FX388_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016900UL)
#define CYREG_PERI_MS_PPU_FX388_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016904UL)
#define CYREG_PERI_MS_PPU_FX388_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016910UL)
#define CYREG_PERI_MS_PPU_FX388_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016914UL)
#define CYREG_PERI_MS_PPU_FX388_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016918UL)
#define CYREG_PERI_MS_PPU_FX388_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001691CUL)
#define CYREG_PERI_MS_PPU_FX388_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016920UL)
#define CYREG_PERI_MS_PPU_FX388_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016924UL)
#define CYREG_PERI_MS_PPU_FX388_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016930UL)
#define CYREG_PERI_MS_PPU_FX388_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016934UL)
#define CYREG_PERI_MS_PPU_FX388_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016938UL)
#define CYREG_PERI_MS_PPU_FX388_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001693CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX389)
  */
#define CYREG_PERI_MS_PPU_FX389_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016940UL)
#define CYREG_PERI_MS_PPU_FX389_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016944UL)
#define CYREG_PERI_MS_PPU_FX389_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016950UL)
#define CYREG_PERI_MS_PPU_FX389_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016954UL)
#define CYREG_PERI_MS_PPU_FX389_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016958UL)
#define CYREG_PERI_MS_PPU_FX389_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001695CUL)
#define CYREG_PERI_MS_PPU_FX389_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016960UL)
#define CYREG_PERI_MS_PPU_FX389_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016964UL)
#define CYREG_PERI_MS_PPU_FX389_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016970UL)
#define CYREG_PERI_MS_PPU_FX389_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016974UL)
#define CYREG_PERI_MS_PPU_FX389_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016978UL)
#define CYREG_PERI_MS_PPU_FX389_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001697CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX390)
  */
#define CYREG_PERI_MS_PPU_FX390_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016980UL)
#define CYREG_PERI_MS_PPU_FX390_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016984UL)
#define CYREG_PERI_MS_PPU_FX390_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016990UL)
#define CYREG_PERI_MS_PPU_FX390_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016994UL)
#define CYREG_PERI_MS_PPU_FX390_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016998UL)
#define CYREG_PERI_MS_PPU_FX390_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001699CUL)
#define CYREG_PERI_MS_PPU_FX390_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400169A0UL)
#define CYREG_PERI_MS_PPU_FX390_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400169A4UL)
#define CYREG_PERI_MS_PPU_FX390_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400169B0UL)
#define CYREG_PERI_MS_PPU_FX390_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400169B4UL)
#define CYREG_PERI_MS_PPU_FX390_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400169B8UL)
#define CYREG_PERI_MS_PPU_FX390_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400169BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX391)
  */
#define CYREG_PERI_MS_PPU_FX391_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400169C0UL)
#define CYREG_PERI_MS_PPU_FX391_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400169C4UL)
#define CYREG_PERI_MS_PPU_FX391_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400169D0UL)
#define CYREG_PERI_MS_PPU_FX391_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400169D4UL)
#define CYREG_PERI_MS_PPU_FX391_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400169D8UL)
#define CYREG_PERI_MS_PPU_FX391_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400169DCUL)
#define CYREG_PERI_MS_PPU_FX391_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400169E0UL)
#define CYREG_PERI_MS_PPU_FX391_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400169E4UL)
#define CYREG_PERI_MS_PPU_FX391_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400169F0UL)
#define CYREG_PERI_MS_PPU_FX391_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400169F4UL)
#define CYREG_PERI_MS_PPU_FX391_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400169F8UL)
#define CYREG_PERI_MS_PPU_FX391_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400169FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX392)
  */
#define CYREG_PERI_MS_PPU_FX392_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016A00UL)
#define CYREG_PERI_MS_PPU_FX392_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016A04UL)
#define CYREG_PERI_MS_PPU_FX392_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016A10UL)
#define CYREG_PERI_MS_PPU_FX392_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016A14UL)
#define CYREG_PERI_MS_PPU_FX392_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016A18UL)
#define CYREG_PERI_MS_PPU_FX392_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016A1CUL)
#define CYREG_PERI_MS_PPU_FX392_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016A20UL)
#define CYREG_PERI_MS_PPU_FX392_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016A24UL)
#define CYREG_PERI_MS_PPU_FX392_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016A30UL)
#define CYREG_PERI_MS_PPU_FX392_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016A34UL)
#define CYREG_PERI_MS_PPU_FX392_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016A38UL)
#define CYREG_PERI_MS_PPU_FX392_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX393)
  */
#define CYREG_PERI_MS_PPU_FX393_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016A40UL)
#define CYREG_PERI_MS_PPU_FX393_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016A44UL)
#define CYREG_PERI_MS_PPU_FX393_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016A50UL)
#define CYREG_PERI_MS_PPU_FX393_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016A54UL)
#define CYREG_PERI_MS_PPU_FX393_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016A58UL)
#define CYREG_PERI_MS_PPU_FX393_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016A5CUL)
#define CYREG_PERI_MS_PPU_FX393_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016A60UL)
#define CYREG_PERI_MS_PPU_FX393_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016A64UL)
#define CYREG_PERI_MS_PPU_FX393_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016A70UL)
#define CYREG_PERI_MS_PPU_FX393_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016A74UL)
#define CYREG_PERI_MS_PPU_FX393_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016A78UL)
#define CYREG_PERI_MS_PPU_FX393_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX394)
  */
#define CYREG_PERI_MS_PPU_FX394_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016A80UL)
#define CYREG_PERI_MS_PPU_FX394_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016A84UL)
#define CYREG_PERI_MS_PPU_FX394_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016A90UL)
#define CYREG_PERI_MS_PPU_FX394_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016A94UL)
#define CYREG_PERI_MS_PPU_FX394_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016A98UL)
#define CYREG_PERI_MS_PPU_FX394_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016A9CUL)
#define CYREG_PERI_MS_PPU_FX394_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016AA0UL)
#define CYREG_PERI_MS_PPU_FX394_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016AA4UL)
#define CYREG_PERI_MS_PPU_FX394_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016AB0UL)
#define CYREG_PERI_MS_PPU_FX394_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016AB4UL)
#define CYREG_PERI_MS_PPU_FX394_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016AB8UL)
#define CYREG_PERI_MS_PPU_FX394_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX395)
  */
#define CYREG_PERI_MS_PPU_FX395_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016AC0UL)
#define CYREG_PERI_MS_PPU_FX395_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016AC4UL)
#define CYREG_PERI_MS_PPU_FX395_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016AD0UL)
#define CYREG_PERI_MS_PPU_FX395_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016AD4UL)
#define CYREG_PERI_MS_PPU_FX395_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016AD8UL)
#define CYREG_PERI_MS_PPU_FX395_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016ADCUL)
#define CYREG_PERI_MS_PPU_FX395_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016AE0UL)
#define CYREG_PERI_MS_PPU_FX395_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016AE4UL)
#define CYREG_PERI_MS_PPU_FX395_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016AF0UL)
#define CYREG_PERI_MS_PPU_FX395_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016AF4UL)
#define CYREG_PERI_MS_PPU_FX395_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016AF8UL)
#define CYREG_PERI_MS_PPU_FX395_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX396)
  */
#define CYREG_PERI_MS_PPU_FX396_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016B00UL)
#define CYREG_PERI_MS_PPU_FX396_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016B04UL)
#define CYREG_PERI_MS_PPU_FX396_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016B10UL)
#define CYREG_PERI_MS_PPU_FX396_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016B14UL)
#define CYREG_PERI_MS_PPU_FX396_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016B18UL)
#define CYREG_PERI_MS_PPU_FX396_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016B1CUL)
#define CYREG_PERI_MS_PPU_FX396_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016B20UL)
#define CYREG_PERI_MS_PPU_FX396_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016B24UL)
#define CYREG_PERI_MS_PPU_FX396_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016B30UL)
#define CYREG_PERI_MS_PPU_FX396_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016B34UL)
#define CYREG_PERI_MS_PPU_FX396_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016B38UL)
#define CYREG_PERI_MS_PPU_FX396_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX397)
  */
#define CYREG_PERI_MS_PPU_FX397_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016B40UL)
#define CYREG_PERI_MS_PPU_FX397_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016B44UL)
#define CYREG_PERI_MS_PPU_FX397_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016B50UL)
#define CYREG_PERI_MS_PPU_FX397_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016B54UL)
#define CYREG_PERI_MS_PPU_FX397_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016B58UL)
#define CYREG_PERI_MS_PPU_FX397_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016B5CUL)
#define CYREG_PERI_MS_PPU_FX397_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016B60UL)
#define CYREG_PERI_MS_PPU_FX397_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016B64UL)
#define CYREG_PERI_MS_PPU_FX397_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016B70UL)
#define CYREG_PERI_MS_PPU_FX397_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016B74UL)
#define CYREG_PERI_MS_PPU_FX397_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016B78UL)
#define CYREG_PERI_MS_PPU_FX397_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX398)
  */
#define CYREG_PERI_MS_PPU_FX398_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016B80UL)
#define CYREG_PERI_MS_PPU_FX398_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016B84UL)
#define CYREG_PERI_MS_PPU_FX398_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016B90UL)
#define CYREG_PERI_MS_PPU_FX398_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016B94UL)
#define CYREG_PERI_MS_PPU_FX398_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016B98UL)
#define CYREG_PERI_MS_PPU_FX398_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016B9CUL)
#define CYREG_PERI_MS_PPU_FX398_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016BA0UL)
#define CYREG_PERI_MS_PPU_FX398_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016BA4UL)
#define CYREG_PERI_MS_PPU_FX398_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016BB0UL)
#define CYREG_PERI_MS_PPU_FX398_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016BB4UL)
#define CYREG_PERI_MS_PPU_FX398_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016BB8UL)
#define CYREG_PERI_MS_PPU_FX398_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX399)
  */
#define CYREG_PERI_MS_PPU_FX399_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016BC0UL)
#define CYREG_PERI_MS_PPU_FX399_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016BC4UL)
#define CYREG_PERI_MS_PPU_FX399_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016BD0UL)
#define CYREG_PERI_MS_PPU_FX399_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016BD4UL)
#define CYREG_PERI_MS_PPU_FX399_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016BD8UL)
#define CYREG_PERI_MS_PPU_FX399_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016BDCUL)
#define CYREG_PERI_MS_PPU_FX399_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016BE0UL)
#define CYREG_PERI_MS_PPU_FX399_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016BE4UL)
#define CYREG_PERI_MS_PPU_FX399_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016BF0UL)
#define CYREG_PERI_MS_PPU_FX399_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016BF4UL)
#define CYREG_PERI_MS_PPU_FX399_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016BF8UL)
#define CYREG_PERI_MS_PPU_FX399_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX400)
  */
#define CYREG_PERI_MS_PPU_FX400_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016C00UL)
#define CYREG_PERI_MS_PPU_FX400_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016C04UL)
#define CYREG_PERI_MS_PPU_FX400_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016C10UL)
#define CYREG_PERI_MS_PPU_FX400_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016C14UL)
#define CYREG_PERI_MS_PPU_FX400_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016C18UL)
#define CYREG_PERI_MS_PPU_FX400_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016C1CUL)
#define CYREG_PERI_MS_PPU_FX400_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016C20UL)
#define CYREG_PERI_MS_PPU_FX400_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016C24UL)
#define CYREG_PERI_MS_PPU_FX400_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016C30UL)
#define CYREG_PERI_MS_PPU_FX400_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016C34UL)
#define CYREG_PERI_MS_PPU_FX400_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016C38UL)
#define CYREG_PERI_MS_PPU_FX400_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX401)
  */
#define CYREG_PERI_MS_PPU_FX401_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016C40UL)
#define CYREG_PERI_MS_PPU_FX401_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016C44UL)
#define CYREG_PERI_MS_PPU_FX401_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016C50UL)
#define CYREG_PERI_MS_PPU_FX401_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016C54UL)
#define CYREG_PERI_MS_PPU_FX401_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016C58UL)
#define CYREG_PERI_MS_PPU_FX401_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016C5CUL)
#define CYREG_PERI_MS_PPU_FX401_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016C60UL)
#define CYREG_PERI_MS_PPU_FX401_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016C64UL)
#define CYREG_PERI_MS_PPU_FX401_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016C70UL)
#define CYREG_PERI_MS_PPU_FX401_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016C74UL)
#define CYREG_PERI_MS_PPU_FX401_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016C78UL)
#define CYREG_PERI_MS_PPU_FX401_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX402)
  */
#define CYREG_PERI_MS_PPU_FX402_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016C80UL)
#define CYREG_PERI_MS_PPU_FX402_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016C84UL)
#define CYREG_PERI_MS_PPU_FX402_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016C90UL)
#define CYREG_PERI_MS_PPU_FX402_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016C94UL)
#define CYREG_PERI_MS_PPU_FX402_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016C98UL)
#define CYREG_PERI_MS_PPU_FX402_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016C9CUL)
#define CYREG_PERI_MS_PPU_FX402_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016CA0UL)
#define CYREG_PERI_MS_PPU_FX402_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016CA4UL)
#define CYREG_PERI_MS_PPU_FX402_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016CB0UL)
#define CYREG_PERI_MS_PPU_FX402_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016CB4UL)
#define CYREG_PERI_MS_PPU_FX402_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016CB8UL)
#define CYREG_PERI_MS_PPU_FX402_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX403)
  */
#define CYREG_PERI_MS_PPU_FX403_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016CC0UL)
#define CYREG_PERI_MS_PPU_FX403_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016CC4UL)
#define CYREG_PERI_MS_PPU_FX403_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016CD0UL)
#define CYREG_PERI_MS_PPU_FX403_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016CD4UL)
#define CYREG_PERI_MS_PPU_FX403_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016CD8UL)
#define CYREG_PERI_MS_PPU_FX403_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016CDCUL)
#define CYREG_PERI_MS_PPU_FX403_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016CE0UL)
#define CYREG_PERI_MS_PPU_FX403_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016CE4UL)
#define CYREG_PERI_MS_PPU_FX403_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016CF0UL)
#define CYREG_PERI_MS_PPU_FX403_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016CF4UL)
#define CYREG_PERI_MS_PPU_FX403_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016CF8UL)
#define CYREG_PERI_MS_PPU_FX403_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX404)
  */
#define CYREG_PERI_MS_PPU_FX404_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016D00UL)
#define CYREG_PERI_MS_PPU_FX404_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016D04UL)
#define CYREG_PERI_MS_PPU_FX404_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016D10UL)
#define CYREG_PERI_MS_PPU_FX404_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016D14UL)
#define CYREG_PERI_MS_PPU_FX404_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016D18UL)
#define CYREG_PERI_MS_PPU_FX404_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016D1CUL)
#define CYREG_PERI_MS_PPU_FX404_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016D20UL)
#define CYREG_PERI_MS_PPU_FX404_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016D24UL)
#define CYREG_PERI_MS_PPU_FX404_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016D30UL)
#define CYREG_PERI_MS_PPU_FX404_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016D34UL)
#define CYREG_PERI_MS_PPU_FX404_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016D38UL)
#define CYREG_PERI_MS_PPU_FX404_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX405)
  */
#define CYREG_PERI_MS_PPU_FX405_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016D40UL)
#define CYREG_PERI_MS_PPU_FX405_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016D44UL)
#define CYREG_PERI_MS_PPU_FX405_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016D50UL)
#define CYREG_PERI_MS_PPU_FX405_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016D54UL)
#define CYREG_PERI_MS_PPU_FX405_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016D58UL)
#define CYREG_PERI_MS_PPU_FX405_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016D5CUL)
#define CYREG_PERI_MS_PPU_FX405_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016D60UL)
#define CYREG_PERI_MS_PPU_FX405_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016D64UL)
#define CYREG_PERI_MS_PPU_FX405_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016D70UL)
#define CYREG_PERI_MS_PPU_FX405_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016D74UL)
#define CYREG_PERI_MS_PPU_FX405_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016D78UL)
#define CYREG_PERI_MS_PPU_FX405_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX406)
  */
#define CYREG_PERI_MS_PPU_FX406_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016D80UL)
#define CYREG_PERI_MS_PPU_FX406_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016D84UL)
#define CYREG_PERI_MS_PPU_FX406_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016D90UL)
#define CYREG_PERI_MS_PPU_FX406_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016D94UL)
#define CYREG_PERI_MS_PPU_FX406_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016D98UL)
#define CYREG_PERI_MS_PPU_FX406_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016D9CUL)
#define CYREG_PERI_MS_PPU_FX406_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016DA0UL)
#define CYREG_PERI_MS_PPU_FX406_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016DA4UL)
#define CYREG_PERI_MS_PPU_FX406_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016DB0UL)
#define CYREG_PERI_MS_PPU_FX406_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016DB4UL)
#define CYREG_PERI_MS_PPU_FX406_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016DB8UL)
#define CYREG_PERI_MS_PPU_FX406_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX407)
  */
#define CYREG_PERI_MS_PPU_FX407_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016DC0UL)
#define CYREG_PERI_MS_PPU_FX407_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016DC4UL)
#define CYREG_PERI_MS_PPU_FX407_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016DD0UL)
#define CYREG_PERI_MS_PPU_FX407_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016DD4UL)
#define CYREG_PERI_MS_PPU_FX407_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016DD8UL)
#define CYREG_PERI_MS_PPU_FX407_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016DDCUL)
#define CYREG_PERI_MS_PPU_FX407_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016DE0UL)
#define CYREG_PERI_MS_PPU_FX407_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016DE4UL)
#define CYREG_PERI_MS_PPU_FX407_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016DF0UL)
#define CYREG_PERI_MS_PPU_FX407_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016DF4UL)
#define CYREG_PERI_MS_PPU_FX407_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016DF8UL)
#define CYREG_PERI_MS_PPU_FX407_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX408)
  */
#define CYREG_PERI_MS_PPU_FX408_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016E00UL)
#define CYREG_PERI_MS_PPU_FX408_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016E04UL)
#define CYREG_PERI_MS_PPU_FX408_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016E10UL)
#define CYREG_PERI_MS_PPU_FX408_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016E14UL)
#define CYREG_PERI_MS_PPU_FX408_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016E18UL)
#define CYREG_PERI_MS_PPU_FX408_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016E1CUL)
#define CYREG_PERI_MS_PPU_FX408_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016E20UL)
#define CYREG_PERI_MS_PPU_FX408_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016E24UL)
#define CYREG_PERI_MS_PPU_FX408_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016E30UL)
#define CYREG_PERI_MS_PPU_FX408_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016E34UL)
#define CYREG_PERI_MS_PPU_FX408_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016E38UL)
#define CYREG_PERI_MS_PPU_FX408_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX409)
  */
#define CYREG_PERI_MS_PPU_FX409_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016E40UL)
#define CYREG_PERI_MS_PPU_FX409_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016E44UL)
#define CYREG_PERI_MS_PPU_FX409_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016E50UL)
#define CYREG_PERI_MS_PPU_FX409_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016E54UL)
#define CYREG_PERI_MS_PPU_FX409_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016E58UL)
#define CYREG_PERI_MS_PPU_FX409_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016E5CUL)
#define CYREG_PERI_MS_PPU_FX409_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016E60UL)
#define CYREG_PERI_MS_PPU_FX409_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016E64UL)
#define CYREG_PERI_MS_PPU_FX409_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016E70UL)
#define CYREG_PERI_MS_PPU_FX409_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016E74UL)
#define CYREG_PERI_MS_PPU_FX409_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016E78UL)
#define CYREG_PERI_MS_PPU_FX409_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX410)
  */
#define CYREG_PERI_MS_PPU_FX410_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016E80UL)
#define CYREG_PERI_MS_PPU_FX410_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016E84UL)
#define CYREG_PERI_MS_PPU_FX410_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016E90UL)
#define CYREG_PERI_MS_PPU_FX410_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016E94UL)
#define CYREG_PERI_MS_PPU_FX410_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016E98UL)
#define CYREG_PERI_MS_PPU_FX410_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016E9CUL)
#define CYREG_PERI_MS_PPU_FX410_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016EA0UL)
#define CYREG_PERI_MS_PPU_FX410_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016EA4UL)
#define CYREG_PERI_MS_PPU_FX410_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016EB0UL)
#define CYREG_PERI_MS_PPU_FX410_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016EB4UL)
#define CYREG_PERI_MS_PPU_FX410_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016EB8UL)
#define CYREG_PERI_MS_PPU_FX410_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX411)
  */
#define CYREG_PERI_MS_PPU_FX411_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016EC0UL)
#define CYREG_PERI_MS_PPU_FX411_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016EC4UL)
#define CYREG_PERI_MS_PPU_FX411_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016ED0UL)
#define CYREG_PERI_MS_PPU_FX411_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016ED4UL)
#define CYREG_PERI_MS_PPU_FX411_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016ED8UL)
#define CYREG_PERI_MS_PPU_FX411_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016EDCUL)
#define CYREG_PERI_MS_PPU_FX411_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016EE0UL)
#define CYREG_PERI_MS_PPU_FX411_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016EE4UL)
#define CYREG_PERI_MS_PPU_FX411_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016EF0UL)
#define CYREG_PERI_MS_PPU_FX411_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016EF4UL)
#define CYREG_PERI_MS_PPU_FX411_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016EF8UL)
#define CYREG_PERI_MS_PPU_FX411_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX412)
  */
#define CYREG_PERI_MS_PPU_FX412_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016F00UL)
#define CYREG_PERI_MS_PPU_FX412_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016F04UL)
#define CYREG_PERI_MS_PPU_FX412_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016F10UL)
#define CYREG_PERI_MS_PPU_FX412_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016F14UL)
#define CYREG_PERI_MS_PPU_FX412_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016F18UL)
#define CYREG_PERI_MS_PPU_FX412_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016F1CUL)
#define CYREG_PERI_MS_PPU_FX412_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016F20UL)
#define CYREG_PERI_MS_PPU_FX412_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016F24UL)
#define CYREG_PERI_MS_PPU_FX412_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016F30UL)
#define CYREG_PERI_MS_PPU_FX412_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016F34UL)
#define CYREG_PERI_MS_PPU_FX412_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016F38UL)
#define CYREG_PERI_MS_PPU_FX412_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX413)
  */
#define CYREG_PERI_MS_PPU_FX413_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016F40UL)
#define CYREG_PERI_MS_PPU_FX413_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016F44UL)
#define CYREG_PERI_MS_PPU_FX413_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016F50UL)
#define CYREG_PERI_MS_PPU_FX413_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016F54UL)
#define CYREG_PERI_MS_PPU_FX413_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016F58UL)
#define CYREG_PERI_MS_PPU_FX413_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016F5CUL)
#define CYREG_PERI_MS_PPU_FX413_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016F60UL)
#define CYREG_PERI_MS_PPU_FX413_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016F64UL)
#define CYREG_PERI_MS_PPU_FX413_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016F70UL)
#define CYREG_PERI_MS_PPU_FX413_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016F74UL)
#define CYREG_PERI_MS_PPU_FX413_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016F78UL)
#define CYREG_PERI_MS_PPU_FX413_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX414)
  */
#define CYREG_PERI_MS_PPU_FX414_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016F80UL)
#define CYREG_PERI_MS_PPU_FX414_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016F84UL)
#define CYREG_PERI_MS_PPU_FX414_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016F90UL)
#define CYREG_PERI_MS_PPU_FX414_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016F94UL)
#define CYREG_PERI_MS_PPU_FX414_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016F98UL)
#define CYREG_PERI_MS_PPU_FX414_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016F9CUL)
#define CYREG_PERI_MS_PPU_FX414_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016FA0UL)
#define CYREG_PERI_MS_PPU_FX414_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016FA4UL)
#define CYREG_PERI_MS_PPU_FX414_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016FB0UL)
#define CYREG_PERI_MS_PPU_FX414_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016FB4UL)
#define CYREG_PERI_MS_PPU_FX414_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016FB8UL)
#define CYREG_PERI_MS_PPU_FX414_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX415)
  */
#define CYREG_PERI_MS_PPU_FX415_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40016FC0UL)
#define CYREG_PERI_MS_PPU_FX415_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40016FC4UL)
#define CYREG_PERI_MS_PPU_FX415_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40016FD0UL)
#define CYREG_PERI_MS_PPU_FX415_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40016FD4UL)
#define CYREG_PERI_MS_PPU_FX415_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40016FD8UL)
#define CYREG_PERI_MS_PPU_FX415_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40016FDCUL)
#define CYREG_PERI_MS_PPU_FX415_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40016FE0UL)
#define CYREG_PERI_MS_PPU_FX415_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40016FE4UL)
#define CYREG_PERI_MS_PPU_FX415_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40016FF0UL)
#define CYREG_PERI_MS_PPU_FX415_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40016FF4UL)
#define CYREG_PERI_MS_PPU_FX415_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40016FF8UL)
#define CYREG_PERI_MS_PPU_FX415_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40016FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX416)
  */
#define CYREG_PERI_MS_PPU_FX416_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017000UL)
#define CYREG_PERI_MS_PPU_FX416_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017004UL)
#define CYREG_PERI_MS_PPU_FX416_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017010UL)
#define CYREG_PERI_MS_PPU_FX416_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017014UL)
#define CYREG_PERI_MS_PPU_FX416_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017018UL)
#define CYREG_PERI_MS_PPU_FX416_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001701CUL)
#define CYREG_PERI_MS_PPU_FX416_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017020UL)
#define CYREG_PERI_MS_PPU_FX416_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017024UL)
#define CYREG_PERI_MS_PPU_FX416_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017030UL)
#define CYREG_PERI_MS_PPU_FX416_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017034UL)
#define CYREG_PERI_MS_PPU_FX416_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017038UL)
#define CYREG_PERI_MS_PPU_FX416_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001703CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX417)
  */
#define CYREG_PERI_MS_PPU_FX417_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017040UL)
#define CYREG_PERI_MS_PPU_FX417_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017044UL)
#define CYREG_PERI_MS_PPU_FX417_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017050UL)
#define CYREG_PERI_MS_PPU_FX417_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017054UL)
#define CYREG_PERI_MS_PPU_FX417_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017058UL)
#define CYREG_PERI_MS_PPU_FX417_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001705CUL)
#define CYREG_PERI_MS_PPU_FX417_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017060UL)
#define CYREG_PERI_MS_PPU_FX417_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017064UL)
#define CYREG_PERI_MS_PPU_FX417_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017070UL)
#define CYREG_PERI_MS_PPU_FX417_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017074UL)
#define CYREG_PERI_MS_PPU_FX417_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017078UL)
#define CYREG_PERI_MS_PPU_FX417_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001707CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX418)
  */
#define CYREG_PERI_MS_PPU_FX418_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017080UL)
#define CYREG_PERI_MS_PPU_FX418_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017084UL)
#define CYREG_PERI_MS_PPU_FX418_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017090UL)
#define CYREG_PERI_MS_PPU_FX418_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017094UL)
#define CYREG_PERI_MS_PPU_FX418_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017098UL)
#define CYREG_PERI_MS_PPU_FX418_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001709CUL)
#define CYREG_PERI_MS_PPU_FX418_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400170A0UL)
#define CYREG_PERI_MS_PPU_FX418_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400170A4UL)
#define CYREG_PERI_MS_PPU_FX418_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400170B0UL)
#define CYREG_PERI_MS_PPU_FX418_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400170B4UL)
#define CYREG_PERI_MS_PPU_FX418_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400170B8UL)
#define CYREG_PERI_MS_PPU_FX418_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400170BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX419)
  */
#define CYREG_PERI_MS_PPU_FX419_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400170C0UL)
#define CYREG_PERI_MS_PPU_FX419_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400170C4UL)
#define CYREG_PERI_MS_PPU_FX419_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400170D0UL)
#define CYREG_PERI_MS_PPU_FX419_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400170D4UL)
#define CYREG_PERI_MS_PPU_FX419_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400170D8UL)
#define CYREG_PERI_MS_PPU_FX419_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400170DCUL)
#define CYREG_PERI_MS_PPU_FX419_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400170E0UL)
#define CYREG_PERI_MS_PPU_FX419_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400170E4UL)
#define CYREG_PERI_MS_PPU_FX419_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400170F0UL)
#define CYREG_PERI_MS_PPU_FX419_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400170F4UL)
#define CYREG_PERI_MS_PPU_FX419_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400170F8UL)
#define CYREG_PERI_MS_PPU_FX419_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400170FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX420)
  */
#define CYREG_PERI_MS_PPU_FX420_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017100UL)
#define CYREG_PERI_MS_PPU_FX420_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017104UL)
#define CYREG_PERI_MS_PPU_FX420_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017110UL)
#define CYREG_PERI_MS_PPU_FX420_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017114UL)
#define CYREG_PERI_MS_PPU_FX420_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017118UL)
#define CYREG_PERI_MS_PPU_FX420_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001711CUL)
#define CYREG_PERI_MS_PPU_FX420_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017120UL)
#define CYREG_PERI_MS_PPU_FX420_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017124UL)
#define CYREG_PERI_MS_PPU_FX420_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017130UL)
#define CYREG_PERI_MS_PPU_FX420_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017134UL)
#define CYREG_PERI_MS_PPU_FX420_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017138UL)
#define CYREG_PERI_MS_PPU_FX420_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001713CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX421)
  */
#define CYREG_PERI_MS_PPU_FX421_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017140UL)
#define CYREG_PERI_MS_PPU_FX421_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017144UL)
#define CYREG_PERI_MS_PPU_FX421_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017150UL)
#define CYREG_PERI_MS_PPU_FX421_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017154UL)
#define CYREG_PERI_MS_PPU_FX421_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017158UL)
#define CYREG_PERI_MS_PPU_FX421_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001715CUL)
#define CYREG_PERI_MS_PPU_FX421_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017160UL)
#define CYREG_PERI_MS_PPU_FX421_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017164UL)
#define CYREG_PERI_MS_PPU_FX421_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017170UL)
#define CYREG_PERI_MS_PPU_FX421_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017174UL)
#define CYREG_PERI_MS_PPU_FX421_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017178UL)
#define CYREG_PERI_MS_PPU_FX421_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001717CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX422)
  */
#define CYREG_PERI_MS_PPU_FX422_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017180UL)
#define CYREG_PERI_MS_PPU_FX422_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017184UL)
#define CYREG_PERI_MS_PPU_FX422_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017190UL)
#define CYREG_PERI_MS_PPU_FX422_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017194UL)
#define CYREG_PERI_MS_PPU_FX422_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017198UL)
#define CYREG_PERI_MS_PPU_FX422_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001719CUL)
#define CYREG_PERI_MS_PPU_FX422_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400171A0UL)
#define CYREG_PERI_MS_PPU_FX422_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400171A4UL)
#define CYREG_PERI_MS_PPU_FX422_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400171B0UL)
#define CYREG_PERI_MS_PPU_FX422_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400171B4UL)
#define CYREG_PERI_MS_PPU_FX422_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400171B8UL)
#define CYREG_PERI_MS_PPU_FX422_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400171BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX423)
  */
#define CYREG_PERI_MS_PPU_FX423_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400171C0UL)
#define CYREG_PERI_MS_PPU_FX423_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400171C4UL)
#define CYREG_PERI_MS_PPU_FX423_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400171D0UL)
#define CYREG_PERI_MS_PPU_FX423_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400171D4UL)
#define CYREG_PERI_MS_PPU_FX423_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400171D8UL)
#define CYREG_PERI_MS_PPU_FX423_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400171DCUL)
#define CYREG_PERI_MS_PPU_FX423_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400171E0UL)
#define CYREG_PERI_MS_PPU_FX423_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400171E4UL)
#define CYREG_PERI_MS_PPU_FX423_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400171F0UL)
#define CYREG_PERI_MS_PPU_FX423_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400171F4UL)
#define CYREG_PERI_MS_PPU_FX423_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400171F8UL)
#define CYREG_PERI_MS_PPU_FX423_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400171FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX424)
  */
#define CYREG_PERI_MS_PPU_FX424_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017200UL)
#define CYREG_PERI_MS_PPU_FX424_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017204UL)
#define CYREG_PERI_MS_PPU_FX424_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017210UL)
#define CYREG_PERI_MS_PPU_FX424_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017214UL)
#define CYREG_PERI_MS_PPU_FX424_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017218UL)
#define CYREG_PERI_MS_PPU_FX424_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001721CUL)
#define CYREG_PERI_MS_PPU_FX424_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017220UL)
#define CYREG_PERI_MS_PPU_FX424_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017224UL)
#define CYREG_PERI_MS_PPU_FX424_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017230UL)
#define CYREG_PERI_MS_PPU_FX424_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017234UL)
#define CYREG_PERI_MS_PPU_FX424_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017238UL)
#define CYREG_PERI_MS_PPU_FX424_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001723CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX425)
  */
#define CYREG_PERI_MS_PPU_FX425_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017240UL)
#define CYREG_PERI_MS_PPU_FX425_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017244UL)
#define CYREG_PERI_MS_PPU_FX425_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017250UL)
#define CYREG_PERI_MS_PPU_FX425_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017254UL)
#define CYREG_PERI_MS_PPU_FX425_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017258UL)
#define CYREG_PERI_MS_PPU_FX425_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001725CUL)
#define CYREG_PERI_MS_PPU_FX425_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017260UL)
#define CYREG_PERI_MS_PPU_FX425_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017264UL)
#define CYREG_PERI_MS_PPU_FX425_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017270UL)
#define CYREG_PERI_MS_PPU_FX425_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017274UL)
#define CYREG_PERI_MS_PPU_FX425_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017278UL)
#define CYREG_PERI_MS_PPU_FX425_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001727CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX426)
  */
#define CYREG_PERI_MS_PPU_FX426_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017280UL)
#define CYREG_PERI_MS_PPU_FX426_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017284UL)
#define CYREG_PERI_MS_PPU_FX426_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017290UL)
#define CYREG_PERI_MS_PPU_FX426_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017294UL)
#define CYREG_PERI_MS_PPU_FX426_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017298UL)
#define CYREG_PERI_MS_PPU_FX426_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001729CUL)
#define CYREG_PERI_MS_PPU_FX426_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400172A0UL)
#define CYREG_PERI_MS_PPU_FX426_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400172A4UL)
#define CYREG_PERI_MS_PPU_FX426_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400172B0UL)
#define CYREG_PERI_MS_PPU_FX426_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400172B4UL)
#define CYREG_PERI_MS_PPU_FX426_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400172B8UL)
#define CYREG_PERI_MS_PPU_FX426_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400172BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX427)
  */
#define CYREG_PERI_MS_PPU_FX427_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400172C0UL)
#define CYREG_PERI_MS_PPU_FX427_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400172C4UL)
#define CYREG_PERI_MS_PPU_FX427_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400172D0UL)
#define CYREG_PERI_MS_PPU_FX427_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400172D4UL)
#define CYREG_PERI_MS_PPU_FX427_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400172D8UL)
#define CYREG_PERI_MS_PPU_FX427_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400172DCUL)
#define CYREG_PERI_MS_PPU_FX427_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400172E0UL)
#define CYREG_PERI_MS_PPU_FX427_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400172E4UL)
#define CYREG_PERI_MS_PPU_FX427_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400172F0UL)
#define CYREG_PERI_MS_PPU_FX427_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400172F4UL)
#define CYREG_PERI_MS_PPU_FX427_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400172F8UL)
#define CYREG_PERI_MS_PPU_FX427_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400172FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX428)
  */
#define CYREG_PERI_MS_PPU_FX428_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017300UL)
#define CYREG_PERI_MS_PPU_FX428_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017304UL)
#define CYREG_PERI_MS_PPU_FX428_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017310UL)
#define CYREG_PERI_MS_PPU_FX428_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017314UL)
#define CYREG_PERI_MS_PPU_FX428_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017318UL)
#define CYREG_PERI_MS_PPU_FX428_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001731CUL)
#define CYREG_PERI_MS_PPU_FX428_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017320UL)
#define CYREG_PERI_MS_PPU_FX428_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017324UL)
#define CYREG_PERI_MS_PPU_FX428_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017330UL)
#define CYREG_PERI_MS_PPU_FX428_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017334UL)
#define CYREG_PERI_MS_PPU_FX428_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017338UL)
#define CYREG_PERI_MS_PPU_FX428_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001733CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX429)
  */
#define CYREG_PERI_MS_PPU_FX429_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017340UL)
#define CYREG_PERI_MS_PPU_FX429_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017344UL)
#define CYREG_PERI_MS_PPU_FX429_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017350UL)
#define CYREG_PERI_MS_PPU_FX429_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017354UL)
#define CYREG_PERI_MS_PPU_FX429_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017358UL)
#define CYREG_PERI_MS_PPU_FX429_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001735CUL)
#define CYREG_PERI_MS_PPU_FX429_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017360UL)
#define CYREG_PERI_MS_PPU_FX429_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017364UL)
#define CYREG_PERI_MS_PPU_FX429_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017370UL)
#define CYREG_PERI_MS_PPU_FX429_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017374UL)
#define CYREG_PERI_MS_PPU_FX429_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017378UL)
#define CYREG_PERI_MS_PPU_FX429_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001737CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX430)
  */
#define CYREG_PERI_MS_PPU_FX430_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017380UL)
#define CYREG_PERI_MS_PPU_FX430_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017384UL)
#define CYREG_PERI_MS_PPU_FX430_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017390UL)
#define CYREG_PERI_MS_PPU_FX430_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017394UL)
#define CYREG_PERI_MS_PPU_FX430_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017398UL)
#define CYREG_PERI_MS_PPU_FX430_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001739CUL)
#define CYREG_PERI_MS_PPU_FX430_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400173A0UL)
#define CYREG_PERI_MS_PPU_FX430_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400173A4UL)
#define CYREG_PERI_MS_PPU_FX430_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400173B0UL)
#define CYREG_PERI_MS_PPU_FX430_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400173B4UL)
#define CYREG_PERI_MS_PPU_FX430_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400173B8UL)
#define CYREG_PERI_MS_PPU_FX430_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400173BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX431)
  */
#define CYREG_PERI_MS_PPU_FX431_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400173C0UL)
#define CYREG_PERI_MS_PPU_FX431_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400173C4UL)
#define CYREG_PERI_MS_PPU_FX431_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400173D0UL)
#define CYREG_PERI_MS_PPU_FX431_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400173D4UL)
#define CYREG_PERI_MS_PPU_FX431_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400173D8UL)
#define CYREG_PERI_MS_PPU_FX431_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400173DCUL)
#define CYREG_PERI_MS_PPU_FX431_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400173E0UL)
#define CYREG_PERI_MS_PPU_FX431_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400173E4UL)
#define CYREG_PERI_MS_PPU_FX431_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400173F0UL)
#define CYREG_PERI_MS_PPU_FX431_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400173F4UL)
#define CYREG_PERI_MS_PPU_FX431_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400173F8UL)
#define CYREG_PERI_MS_PPU_FX431_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400173FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX432)
  */
#define CYREG_PERI_MS_PPU_FX432_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017400UL)
#define CYREG_PERI_MS_PPU_FX432_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017404UL)
#define CYREG_PERI_MS_PPU_FX432_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017410UL)
#define CYREG_PERI_MS_PPU_FX432_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017414UL)
#define CYREG_PERI_MS_PPU_FX432_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017418UL)
#define CYREG_PERI_MS_PPU_FX432_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001741CUL)
#define CYREG_PERI_MS_PPU_FX432_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017420UL)
#define CYREG_PERI_MS_PPU_FX432_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017424UL)
#define CYREG_PERI_MS_PPU_FX432_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017430UL)
#define CYREG_PERI_MS_PPU_FX432_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017434UL)
#define CYREG_PERI_MS_PPU_FX432_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017438UL)
#define CYREG_PERI_MS_PPU_FX432_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001743CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX433)
  */
#define CYREG_PERI_MS_PPU_FX433_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017440UL)
#define CYREG_PERI_MS_PPU_FX433_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017444UL)
#define CYREG_PERI_MS_PPU_FX433_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017450UL)
#define CYREG_PERI_MS_PPU_FX433_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017454UL)
#define CYREG_PERI_MS_PPU_FX433_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017458UL)
#define CYREG_PERI_MS_PPU_FX433_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001745CUL)
#define CYREG_PERI_MS_PPU_FX433_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017460UL)
#define CYREG_PERI_MS_PPU_FX433_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017464UL)
#define CYREG_PERI_MS_PPU_FX433_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017470UL)
#define CYREG_PERI_MS_PPU_FX433_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017474UL)
#define CYREG_PERI_MS_PPU_FX433_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017478UL)
#define CYREG_PERI_MS_PPU_FX433_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001747CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX434)
  */
#define CYREG_PERI_MS_PPU_FX434_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017480UL)
#define CYREG_PERI_MS_PPU_FX434_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017484UL)
#define CYREG_PERI_MS_PPU_FX434_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017490UL)
#define CYREG_PERI_MS_PPU_FX434_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017494UL)
#define CYREG_PERI_MS_PPU_FX434_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017498UL)
#define CYREG_PERI_MS_PPU_FX434_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001749CUL)
#define CYREG_PERI_MS_PPU_FX434_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400174A0UL)
#define CYREG_PERI_MS_PPU_FX434_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400174A4UL)
#define CYREG_PERI_MS_PPU_FX434_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400174B0UL)
#define CYREG_PERI_MS_PPU_FX434_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400174B4UL)
#define CYREG_PERI_MS_PPU_FX434_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400174B8UL)
#define CYREG_PERI_MS_PPU_FX434_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400174BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX435)
  */
#define CYREG_PERI_MS_PPU_FX435_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400174C0UL)
#define CYREG_PERI_MS_PPU_FX435_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400174C4UL)
#define CYREG_PERI_MS_PPU_FX435_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400174D0UL)
#define CYREG_PERI_MS_PPU_FX435_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400174D4UL)
#define CYREG_PERI_MS_PPU_FX435_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400174D8UL)
#define CYREG_PERI_MS_PPU_FX435_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400174DCUL)
#define CYREG_PERI_MS_PPU_FX435_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400174E0UL)
#define CYREG_PERI_MS_PPU_FX435_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400174E4UL)
#define CYREG_PERI_MS_PPU_FX435_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400174F0UL)
#define CYREG_PERI_MS_PPU_FX435_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400174F4UL)
#define CYREG_PERI_MS_PPU_FX435_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400174F8UL)
#define CYREG_PERI_MS_PPU_FX435_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400174FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX436)
  */
#define CYREG_PERI_MS_PPU_FX436_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017500UL)
#define CYREG_PERI_MS_PPU_FX436_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017504UL)
#define CYREG_PERI_MS_PPU_FX436_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017510UL)
#define CYREG_PERI_MS_PPU_FX436_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017514UL)
#define CYREG_PERI_MS_PPU_FX436_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017518UL)
#define CYREG_PERI_MS_PPU_FX436_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001751CUL)
#define CYREG_PERI_MS_PPU_FX436_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017520UL)
#define CYREG_PERI_MS_PPU_FX436_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017524UL)
#define CYREG_PERI_MS_PPU_FX436_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017530UL)
#define CYREG_PERI_MS_PPU_FX436_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017534UL)
#define CYREG_PERI_MS_PPU_FX436_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017538UL)
#define CYREG_PERI_MS_PPU_FX436_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001753CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX437)
  */
#define CYREG_PERI_MS_PPU_FX437_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017540UL)
#define CYREG_PERI_MS_PPU_FX437_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017544UL)
#define CYREG_PERI_MS_PPU_FX437_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017550UL)
#define CYREG_PERI_MS_PPU_FX437_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017554UL)
#define CYREG_PERI_MS_PPU_FX437_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017558UL)
#define CYREG_PERI_MS_PPU_FX437_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001755CUL)
#define CYREG_PERI_MS_PPU_FX437_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017560UL)
#define CYREG_PERI_MS_PPU_FX437_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017564UL)
#define CYREG_PERI_MS_PPU_FX437_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017570UL)
#define CYREG_PERI_MS_PPU_FX437_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017574UL)
#define CYREG_PERI_MS_PPU_FX437_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017578UL)
#define CYREG_PERI_MS_PPU_FX437_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001757CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX438)
  */
#define CYREG_PERI_MS_PPU_FX438_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017580UL)
#define CYREG_PERI_MS_PPU_FX438_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017584UL)
#define CYREG_PERI_MS_PPU_FX438_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017590UL)
#define CYREG_PERI_MS_PPU_FX438_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017594UL)
#define CYREG_PERI_MS_PPU_FX438_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017598UL)
#define CYREG_PERI_MS_PPU_FX438_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001759CUL)
#define CYREG_PERI_MS_PPU_FX438_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400175A0UL)
#define CYREG_PERI_MS_PPU_FX438_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400175A4UL)
#define CYREG_PERI_MS_PPU_FX438_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400175B0UL)
#define CYREG_PERI_MS_PPU_FX438_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400175B4UL)
#define CYREG_PERI_MS_PPU_FX438_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400175B8UL)
#define CYREG_PERI_MS_PPU_FX438_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400175BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX439)
  */
#define CYREG_PERI_MS_PPU_FX439_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400175C0UL)
#define CYREG_PERI_MS_PPU_FX439_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400175C4UL)
#define CYREG_PERI_MS_PPU_FX439_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400175D0UL)
#define CYREG_PERI_MS_PPU_FX439_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400175D4UL)
#define CYREG_PERI_MS_PPU_FX439_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400175D8UL)
#define CYREG_PERI_MS_PPU_FX439_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400175DCUL)
#define CYREG_PERI_MS_PPU_FX439_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400175E0UL)
#define CYREG_PERI_MS_PPU_FX439_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400175E4UL)
#define CYREG_PERI_MS_PPU_FX439_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400175F0UL)
#define CYREG_PERI_MS_PPU_FX439_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400175F4UL)
#define CYREG_PERI_MS_PPU_FX439_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400175F8UL)
#define CYREG_PERI_MS_PPU_FX439_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400175FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX440)
  */
#define CYREG_PERI_MS_PPU_FX440_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017600UL)
#define CYREG_PERI_MS_PPU_FX440_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017604UL)
#define CYREG_PERI_MS_PPU_FX440_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017610UL)
#define CYREG_PERI_MS_PPU_FX440_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017614UL)
#define CYREG_PERI_MS_PPU_FX440_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017618UL)
#define CYREG_PERI_MS_PPU_FX440_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001761CUL)
#define CYREG_PERI_MS_PPU_FX440_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017620UL)
#define CYREG_PERI_MS_PPU_FX440_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017624UL)
#define CYREG_PERI_MS_PPU_FX440_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017630UL)
#define CYREG_PERI_MS_PPU_FX440_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017634UL)
#define CYREG_PERI_MS_PPU_FX440_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017638UL)
#define CYREG_PERI_MS_PPU_FX440_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001763CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX441)
  */
#define CYREG_PERI_MS_PPU_FX441_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017640UL)
#define CYREG_PERI_MS_PPU_FX441_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017644UL)
#define CYREG_PERI_MS_PPU_FX441_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017650UL)
#define CYREG_PERI_MS_PPU_FX441_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017654UL)
#define CYREG_PERI_MS_PPU_FX441_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017658UL)
#define CYREG_PERI_MS_PPU_FX441_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001765CUL)
#define CYREG_PERI_MS_PPU_FX441_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017660UL)
#define CYREG_PERI_MS_PPU_FX441_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017664UL)
#define CYREG_PERI_MS_PPU_FX441_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017670UL)
#define CYREG_PERI_MS_PPU_FX441_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017674UL)
#define CYREG_PERI_MS_PPU_FX441_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017678UL)
#define CYREG_PERI_MS_PPU_FX441_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001767CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX442)
  */
#define CYREG_PERI_MS_PPU_FX442_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017680UL)
#define CYREG_PERI_MS_PPU_FX442_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017684UL)
#define CYREG_PERI_MS_PPU_FX442_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017690UL)
#define CYREG_PERI_MS_PPU_FX442_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017694UL)
#define CYREG_PERI_MS_PPU_FX442_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017698UL)
#define CYREG_PERI_MS_PPU_FX442_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001769CUL)
#define CYREG_PERI_MS_PPU_FX442_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400176A0UL)
#define CYREG_PERI_MS_PPU_FX442_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400176A4UL)
#define CYREG_PERI_MS_PPU_FX442_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400176B0UL)
#define CYREG_PERI_MS_PPU_FX442_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400176B4UL)
#define CYREG_PERI_MS_PPU_FX442_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400176B8UL)
#define CYREG_PERI_MS_PPU_FX442_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400176BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX443)
  */
#define CYREG_PERI_MS_PPU_FX443_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400176C0UL)
#define CYREG_PERI_MS_PPU_FX443_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400176C4UL)
#define CYREG_PERI_MS_PPU_FX443_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400176D0UL)
#define CYREG_PERI_MS_PPU_FX443_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400176D4UL)
#define CYREG_PERI_MS_PPU_FX443_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400176D8UL)
#define CYREG_PERI_MS_PPU_FX443_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400176DCUL)
#define CYREG_PERI_MS_PPU_FX443_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400176E0UL)
#define CYREG_PERI_MS_PPU_FX443_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400176E4UL)
#define CYREG_PERI_MS_PPU_FX443_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400176F0UL)
#define CYREG_PERI_MS_PPU_FX443_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400176F4UL)
#define CYREG_PERI_MS_PPU_FX443_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400176F8UL)
#define CYREG_PERI_MS_PPU_FX443_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400176FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX444)
  */
#define CYREG_PERI_MS_PPU_FX444_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017700UL)
#define CYREG_PERI_MS_PPU_FX444_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017704UL)
#define CYREG_PERI_MS_PPU_FX444_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017710UL)
#define CYREG_PERI_MS_PPU_FX444_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017714UL)
#define CYREG_PERI_MS_PPU_FX444_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017718UL)
#define CYREG_PERI_MS_PPU_FX444_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001771CUL)
#define CYREG_PERI_MS_PPU_FX444_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017720UL)
#define CYREG_PERI_MS_PPU_FX444_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017724UL)
#define CYREG_PERI_MS_PPU_FX444_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017730UL)
#define CYREG_PERI_MS_PPU_FX444_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017734UL)
#define CYREG_PERI_MS_PPU_FX444_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017738UL)
#define CYREG_PERI_MS_PPU_FX444_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001773CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX445)
  */
#define CYREG_PERI_MS_PPU_FX445_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017740UL)
#define CYREG_PERI_MS_PPU_FX445_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017744UL)
#define CYREG_PERI_MS_PPU_FX445_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017750UL)
#define CYREG_PERI_MS_PPU_FX445_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017754UL)
#define CYREG_PERI_MS_PPU_FX445_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017758UL)
#define CYREG_PERI_MS_PPU_FX445_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001775CUL)
#define CYREG_PERI_MS_PPU_FX445_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017760UL)
#define CYREG_PERI_MS_PPU_FX445_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017764UL)
#define CYREG_PERI_MS_PPU_FX445_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017770UL)
#define CYREG_PERI_MS_PPU_FX445_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017774UL)
#define CYREG_PERI_MS_PPU_FX445_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017778UL)
#define CYREG_PERI_MS_PPU_FX445_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001777CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX446)
  */
#define CYREG_PERI_MS_PPU_FX446_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017780UL)
#define CYREG_PERI_MS_PPU_FX446_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017784UL)
#define CYREG_PERI_MS_PPU_FX446_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017790UL)
#define CYREG_PERI_MS_PPU_FX446_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017794UL)
#define CYREG_PERI_MS_PPU_FX446_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017798UL)
#define CYREG_PERI_MS_PPU_FX446_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001779CUL)
#define CYREG_PERI_MS_PPU_FX446_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400177A0UL)
#define CYREG_PERI_MS_PPU_FX446_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400177A4UL)
#define CYREG_PERI_MS_PPU_FX446_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400177B0UL)
#define CYREG_PERI_MS_PPU_FX446_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400177B4UL)
#define CYREG_PERI_MS_PPU_FX446_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400177B8UL)
#define CYREG_PERI_MS_PPU_FX446_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400177BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX447)
  */
#define CYREG_PERI_MS_PPU_FX447_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400177C0UL)
#define CYREG_PERI_MS_PPU_FX447_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400177C4UL)
#define CYREG_PERI_MS_PPU_FX447_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400177D0UL)
#define CYREG_PERI_MS_PPU_FX447_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400177D4UL)
#define CYREG_PERI_MS_PPU_FX447_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400177D8UL)
#define CYREG_PERI_MS_PPU_FX447_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400177DCUL)
#define CYREG_PERI_MS_PPU_FX447_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400177E0UL)
#define CYREG_PERI_MS_PPU_FX447_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400177E4UL)
#define CYREG_PERI_MS_PPU_FX447_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400177F0UL)
#define CYREG_PERI_MS_PPU_FX447_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400177F4UL)
#define CYREG_PERI_MS_PPU_FX447_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400177F8UL)
#define CYREG_PERI_MS_PPU_FX447_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400177FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX448)
  */
#define CYREG_PERI_MS_PPU_FX448_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017800UL)
#define CYREG_PERI_MS_PPU_FX448_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017804UL)
#define CYREG_PERI_MS_PPU_FX448_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017810UL)
#define CYREG_PERI_MS_PPU_FX448_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017814UL)
#define CYREG_PERI_MS_PPU_FX448_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017818UL)
#define CYREG_PERI_MS_PPU_FX448_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001781CUL)
#define CYREG_PERI_MS_PPU_FX448_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017820UL)
#define CYREG_PERI_MS_PPU_FX448_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017824UL)
#define CYREG_PERI_MS_PPU_FX448_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017830UL)
#define CYREG_PERI_MS_PPU_FX448_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017834UL)
#define CYREG_PERI_MS_PPU_FX448_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017838UL)
#define CYREG_PERI_MS_PPU_FX448_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001783CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX449)
  */
#define CYREG_PERI_MS_PPU_FX449_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017840UL)
#define CYREG_PERI_MS_PPU_FX449_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017844UL)
#define CYREG_PERI_MS_PPU_FX449_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017850UL)
#define CYREG_PERI_MS_PPU_FX449_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017854UL)
#define CYREG_PERI_MS_PPU_FX449_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017858UL)
#define CYREG_PERI_MS_PPU_FX449_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001785CUL)
#define CYREG_PERI_MS_PPU_FX449_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017860UL)
#define CYREG_PERI_MS_PPU_FX449_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017864UL)
#define CYREG_PERI_MS_PPU_FX449_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017870UL)
#define CYREG_PERI_MS_PPU_FX449_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017874UL)
#define CYREG_PERI_MS_PPU_FX449_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017878UL)
#define CYREG_PERI_MS_PPU_FX449_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001787CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX450)
  */
#define CYREG_PERI_MS_PPU_FX450_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017880UL)
#define CYREG_PERI_MS_PPU_FX450_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017884UL)
#define CYREG_PERI_MS_PPU_FX450_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017890UL)
#define CYREG_PERI_MS_PPU_FX450_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017894UL)
#define CYREG_PERI_MS_PPU_FX450_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017898UL)
#define CYREG_PERI_MS_PPU_FX450_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001789CUL)
#define CYREG_PERI_MS_PPU_FX450_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400178A0UL)
#define CYREG_PERI_MS_PPU_FX450_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400178A4UL)
#define CYREG_PERI_MS_PPU_FX450_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400178B0UL)
#define CYREG_PERI_MS_PPU_FX450_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400178B4UL)
#define CYREG_PERI_MS_PPU_FX450_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400178B8UL)
#define CYREG_PERI_MS_PPU_FX450_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400178BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX451)
  */
#define CYREG_PERI_MS_PPU_FX451_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400178C0UL)
#define CYREG_PERI_MS_PPU_FX451_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400178C4UL)
#define CYREG_PERI_MS_PPU_FX451_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400178D0UL)
#define CYREG_PERI_MS_PPU_FX451_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400178D4UL)
#define CYREG_PERI_MS_PPU_FX451_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400178D8UL)
#define CYREG_PERI_MS_PPU_FX451_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400178DCUL)
#define CYREG_PERI_MS_PPU_FX451_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400178E0UL)
#define CYREG_PERI_MS_PPU_FX451_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400178E4UL)
#define CYREG_PERI_MS_PPU_FX451_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400178F0UL)
#define CYREG_PERI_MS_PPU_FX451_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400178F4UL)
#define CYREG_PERI_MS_PPU_FX451_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400178F8UL)
#define CYREG_PERI_MS_PPU_FX451_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400178FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX452)
  */
#define CYREG_PERI_MS_PPU_FX452_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017900UL)
#define CYREG_PERI_MS_PPU_FX452_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017904UL)
#define CYREG_PERI_MS_PPU_FX452_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017910UL)
#define CYREG_PERI_MS_PPU_FX452_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017914UL)
#define CYREG_PERI_MS_PPU_FX452_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017918UL)
#define CYREG_PERI_MS_PPU_FX452_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001791CUL)
#define CYREG_PERI_MS_PPU_FX452_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017920UL)
#define CYREG_PERI_MS_PPU_FX452_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017924UL)
#define CYREG_PERI_MS_PPU_FX452_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017930UL)
#define CYREG_PERI_MS_PPU_FX452_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017934UL)
#define CYREG_PERI_MS_PPU_FX452_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017938UL)
#define CYREG_PERI_MS_PPU_FX452_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001793CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX453)
  */
#define CYREG_PERI_MS_PPU_FX453_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017940UL)
#define CYREG_PERI_MS_PPU_FX453_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017944UL)
#define CYREG_PERI_MS_PPU_FX453_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017950UL)
#define CYREG_PERI_MS_PPU_FX453_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017954UL)
#define CYREG_PERI_MS_PPU_FX453_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017958UL)
#define CYREG_PERI_MS_PPU_FX453_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001795CUL)
#define CYREG_PERI_MS_PPU_FX453_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017960UL)
#define CYREG_PERI_MS_PPU_FX453_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017964UL)
#define CYREG_PERI_MS_PPU_FX453_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017970UL)
#define CYREG_PERI_MS_PPU_FX453_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017974UL)
#define CYREG_PERI_MS_PPU_FX453_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017978UL)
#define CYREG_PERI_MS_PPU_FX453_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001797CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX454)
  */
#define CYREG_PERI_MS_PPU_FX454_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017980UL)
#define CYREG_PERI_MS_PPU_FX454_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017984UL)
#define CYREG_PERI_MS_PPU_FX454_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017990UL)
#define CYREG_PERI_MS_PPU_FX454_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017994UL)
#define CYREG_PERI_MS_PPU_FX454_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017998UL)
#define CYREG_PERI_MS_PPU_FX454_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001799CUL)
#define CYREG_PERI_MS_PPU_FX454_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400179A0UL)
#define CYREG_PERI_MS_PPU_FX454_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400179A4UL)
#define CYREG_PERI_MS_PPU_FX454_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400179B0UL)
#define CYREG_PERI_MS_PPU_FX454_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400179B4UL)
#define CYREG_PERI_MS_PPU_FX454_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400179B8UL)
#define CYREG_PERI_MS_PPU_FX454_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400179BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX455)
  */
#define CYREG_PERI_MS_PPU_FX455_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400179C0UL)
#define CYREG_PERI_MS_PPU_FX455_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400179C4UL)
#define CYREG_PERI_MS_PPU_FX455_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400179D0UL)
#define CYREG_PERI_MS_PPU_FX455_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400179D4UL)
#define CYREG_PERI_MS_PPU_FX455_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400179D8UL)
#define CYREG_PERI_MS_PPU_FX455_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400179DCUL)
#define CYREG_PERI_MS_PPU_FX455_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400179E0UL)
#define CYREG_PERI_MS_PPU_FX455_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400179E4UL)
#define CYREG_PERI_MS_PPU_FX455_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400179F0UL)
#define CYREG_PERI_MS_PPU_FX455_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400179F4UL)
#define CYREG_PERI_MS_PPU_FX455_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400179F8UL)
#define CYREG_PERI_MS_PPU_FX455_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400179FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX456)
  */
#define CYREG_PERI_MS_PPU_FX456_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017A00UL)
#define CYREG_PERI_MS_PPU_FX456_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017A04UL)
#define CYREG_PERI_MS_PPU_FX456_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017A10UL)
#define CYREG_PERI_MS_PPU_FX456_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017A14UL)
#define CYREG_PERI_MS_PPU_FX456_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017A18UL)
#define CYREG_PERI_MS_PPU_FX456_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017A1CUL)
#define CYREG_PERI_MS_PPU_FX456_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017A20UL)
#define CYREG_PERI_MS_PPU_FX456_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017A24UL)
#define CYREG_PERI_MS_PPU_FX456_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017A30UL)
#define CYREG_PERI_MS_PPU_FX456_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017A34UL)
#define CYREG_PERI_MS_PPU_FX456_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017A38UL)
#define CYREG_PERI_MS_PPU_FX456_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX457)
  */
#define CYREG_PERI_MS_PPU_FX457_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017A40UL)
#define CYREG_PERI_MS_PPU_FX457_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017A44UL)
#define CYREG_PERI_MS_PPU_FX457_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017A50UL)
#define CYREG_PERI_MS_PPU_FX457_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017A54UL)
#define CYREG_PERI_MS_PPU_FX457_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017A58UL)
#define CYREG_PERI_MS_PPU_FX457_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017A5CUL)
#define CYREG_PERI_MS_PPU_FX457_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017A60UL)
#define CYREG_PERI_MS_PPU_FX457_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017A64UL)
#define CYREG_PERI_MS_PPU_FX457_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017A70UL)
#define CYREG_PERI_MS_PPU_FX457_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017A74UL)
#define CYREG_PERI_MS_PPU_FX457_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017A78UL)
#define CYREG_PERI_MS_PPU_FX457_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX458)
  */
#define CYREG_PERI_MS_PPU_FX458_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017A80UL)
#define CYREG_PERI_MS_PPU_FX458_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017A84UL)
#define CYREG_PERI_MS_PPU_FX458_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017A90UL)
#define CYREG_PERI_MS_PPU_FX458_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017A94UL)
#define CYREG_PERI_MS_PPU_FX458_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017A98UL)
#define CYREG_PERI_MS_PPU_FX458_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017A9CUL)
#define CYREG_PERI_MS_PPU_FX458_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017AA0UL)
#define CYREG_PERI_MS_PPU_FX458_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017AA4UL)
#define CYREG_PERI_MS_PPU_FX458_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017AB0UL)
#define CYREG_PERI_MS_PPU_FX458_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017AB4UL)
#define CYREG_PERI_MS_PPU_FX458_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017AB8UL)
#define CYREG_PERI_MS_PPU_FX458_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX459)
  */
#define CYREG_PERI_MS_PPU_FX459_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017AC0UL)
#define CYREG_PERI_MS_PPU_FX459_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017AC4UL)
#define CYREG_PERI_MS_PPU_FX459_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017AD0UL)
#define CYREG_PERI_MS_PPU_FX459_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017AD4UL)
#define CYREG_PERI_MS_PPU_FX459_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017AD8UL)
#define CYREG_PERI_MS_PPU_FX459_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017ADCUL)
#define CYREG_PERI_MS_PPU_FX459_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017AE0UL)
#define CYREG_PERI_MS_PPU_FX459_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017AE4UL)
#define CYREG_PERI_MS_PPU_FX459_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017AF0UL)
#define CYREG_PERI_MS_PPU_FX459_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017AF4UL)
#define CYREG_PERI_MS_PPU_FX459_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017AF8UL)
#define CYREG_PERI_MS_PPU_FX459_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX460)
  */
#define CYREG_PERI_MS_PPU_FX460_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017B00UL)
#define CYREG_PERI_MS_PPU_FX460_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017B04UL)
#define CYREG_PERI_MS_PPU_FX460_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017B10UL)
#define CYREG_PERI_MS_PPU_FX460_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017B14UL)
#define CYREG_PERI_MS_PPU_FX460_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017B18UL)
#define CYREG_PERI_MS_PPU_FX460_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017B1CUL)
#define CYREG_PERI_MS_PPU_FX460_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017B20UL)
#define CYREG_PERI_MS_PPU_FX460_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017B24UL)
#define CYREG_PERI_MS_PPU_FX460_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017B30UL)
#define CYREG_PERI_MS_PPU_FX460_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017B34UL)
#define CYREG_PERI_MS_PPU_FX460_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017B38UL)
#define CYREG_PERI_MS_PPU_FX460_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX461)
  */
#define CYREG_PERI_MS_PPU_FX461_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017B40UL)
#define CYREG_PERI_MS_PPU_FX461_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017B44UL)
#define CYREG_PERI_MS_PPU_FX461_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017B50UL)
#define CYREG_PERI_MS_PPU_FX461_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017B54UL)
#define CYREG_PERI_MS_PPU_FX461_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017B58UL)
#define CYREG_PERI_MS_PPU_FX461_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017B5CUL)
#define CYREG_PERI_MS_PPU_FX461_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017B60UL)
#define CYREG_PERI_MS_PPU_FX461_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017B64UL)
#define CYREG_PERI_MS_PPU_FX461_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017B70UL)
#define CYREG_PERI_MS_PPU_FX461_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017B74UL)
#define CYREG_PERI_MS_PPU_FX461_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017B78UL)
#define CYREG_PERI_MS_PPU_FX461_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX462)
  */
#define CYREG_PERI_MS_PPU_FX462_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017B80UL)
#define CYREG_PERI_MS_PPU_FX462_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017B84UL)
#define CYREG_PERI_MS_PPU_FX462_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017B90UL)
#define CYREG_PERI_MS_PPU_FX462_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017B94UL)
#define CYREG_PERI_MS_PPU_FX462_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017B98UL)
#define CYREG_PERI_MS_PPU_FX462_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017B9CUL)
#define CYREG_PERI_MS_PPU_FX462_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017BA0UL)
#define CYREG_PERI_MS_PPU_FX462_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017BA4UL)
#define CYREG_PERI_MS_PPU_FX462_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017BB0UL)
#define CYREG_PERI_MS_PPU_FX462_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017BB4UL)
#define CYREG_PERI_MS_PPU_FX462_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017BB8UL)
#define CYREG_PERI_MS_PPU_FX462_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX463)
  */
#define CYREG_PERI_MS_PPU_FX463_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017BC0UL)
#define CYREG_PERI_MS_PPU_FX463_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017BC4UL)
#define CYREG_PERI_MS_PPU_FX463_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017BD0UL)
#define CYREG_PERI_MS_PPU_FX463_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017BD4UL)
#define CYREG_PERI_MS_PPU_FX463_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017BD8UL)
#define CYREG_PERI_MS_PPU_FX463_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017BDCUL)
#define CYREG_PERI_MS_PPU_FX463_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017BE0UL)
#define CYREG_PERI_MS_PPU_FX463_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017BE4UL)
#define CYREG_PERI_MS_PPU_FX463_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017BF0UL)
#define CYREG_PERI_MS_PPU_FX463_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017BF4UL)
#define CYREG_PERI_MS_PPU_FX463_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017BF8UL)
#define CYREG_PERI_MS_PPU_FX463_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX464)
  */
#define CYREG_PERI_MS_PPU_FX464_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017C00UL)
#define CYREG_PERI_MS_PPU_FX464_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017C04UL)
#define CYREG_PERI_MS_PPU_FX464_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017C10UL)
#define CYREG_PERI_MS_PPU_FX464_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017C14UL)
#define CYREG_PERI_MS_PPU_FX464_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017C18UL)
#define CYREG_PERI_MS_PPU_FX464_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017C1CUL)
#define CYREG_PERI_MS_PPU_FX464_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017C20UL)
#define CYREG_PERI_MS_PPU_FX464_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017C24UL)
#define CYREG_PERI_MS_PPU_FX464_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017C30UL)
#define CYREG_PERI_MS_PPU_FX464_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017C34UL)
#define CYREG_PERI_MS_PPU_FX464_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017C38UL)
#define CYREG_PERI_MS_PPU_FX464_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX465)
  */
#define CYREG_PERI_MS_PPU_FX465_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017C40UL)
#define CYREG_PERI_MS_PPU_FX465_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017C44UL)
#define CYREG_PERI_MS_PPU_FX465_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017C50UL)
#define CYREG_PERI_MS_PPU_FX465_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017C54UL)
#define CYREG_PERI_MS_PPU_FX465_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017C58UL)
#define CYREG_PERI_MS_PPU_FX465_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017C5CUL)
#define CYREG_PERI_MS_PPU_FX465_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017C60UL)
#define CYREG_PERI_MS_PPU_FX465_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017C64UL)
#define CYREG_PERI_MS_PPU_FX465_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017C70UL)
#define CYREG_PERI_MS_PPU_FX465_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017C74UL)
#define CYREG_PERI_MS_PPU_FX465_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017C78UL)
#define CYREG_PERI_MS_PPU_FX465_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX466)
  */
#define CYREG_PERI_MS_PPU_FX466_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017C80UL)
#define CYREG_PERI_MS_PPU_FX466_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017C84UL)
#define CYREG_PERI_MS_PPU_FX466_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017C90UL)
#define CYREG_PERI_MS_PPU_FX466_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017C94UL)
#define CYREG_PERI_MS_PPU_FX466_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017C98UL)
#define CYREG_PERI_MS_PPU_FX466_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017C9CUL)
#define CYREG_PERI_MS_PPU_FX466_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017CA0UL)
#define CYREG_PERI_MS_PPU_FX466_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017CA4UL)
#define CYREG_PERI_MS_PPU_FX466_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017CB0UL)
#define CYREG_PERI_MS_PPU_FX466_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017CB4UL)
#define CYREG_PERI_MS_PPU_FX466_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017CB8UL)
#define CYREG_PERI_MS_PPU_FX466_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX467)
  */
#define CYREG_PERI_MS_PPU_FX467_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017CC0UL)
#define CYREG_PERI_MS_PPU_FX467_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017CC4UL)
#define CYREG_PERI_MS_PPU_FX467_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017CD0UL)
#define CYREG_PERI_MS_PPU_FX467_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017CD4UL)
#define CYREG_PERI_MS_PPU_FX467_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017CD8UL)
#define CYREG_PERI_MS_PPU_FX467_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017CDCUL)
#define CYREG_PERI_MS_PPU_FX467_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017CE0UL)
#define CYREG_PERI_MS_PPU_FX467_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017CE4UL)
#define CYREG_PERI_MS_PPU_FX467_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017CF0UL)
#define CYREG_PERI_MS_PPU_FX467_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017CF4UL)
#define CYREG_PERI_MS_PPU_FX467_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017CF8UL)
#define CYREG_PERI_MS_PPU_FX467_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX468)
  */
#define CYREG_PERI_MS_PPU_FX468_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017D00UL)
#define CYREG_PERI_MS_PPU_FX468_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017D04UL)
#define CYREG_PERI_MS_PPU_FX468_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017D10UL)
#define CYREG_PERI_MS_PPU_FX468_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017D14UL)
#define CYREG_PERI_MS_PPU_FX468_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017D18UL)
#define CYREG_PERI_MS_PPU_FX468_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017D1CUL)
#define CYREG_PERI_MS_PPU_FX468_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017D20UL)
#define CYREG_PERI_MS_PPU_FX468_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017D24UL)
#define CYREG_PERI_MS_PPU_FX468_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017D30UL)
#define CYREG_PERI_MS_PPU_FX468_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017D34UL)
#define CYREG_PERI_MS_PPU_FX468_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017D38UL)
#define CYREG_PERI_MS_PPU_FX468_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX469)
  */
#define CYREG_PERI_MS_PPU_FX469_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017D40UL)
#define CYREG_PERI_MS_PPU_FX469_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017D44UL)
#define CYREG_PERI_MS_PPU_FX469_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017D50UL)
#define CYREG_PERI_MS_PPU_FX469_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017D54UL)
#define CYREG_PERI_MS_PPU_FX469_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017D58UL)
#define CYREG_PERI_MS_PPU_FX469_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017D5CUL)
#define CYREG_PERI_MS_PPU_FX469_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017D60UL)
#define CYREG_PERI_MS_PPU_FX469_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017D64UL)
#define CYREG_PERI_MS_PPU_FX469_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017D70UL)
#define CYREG_PERI_MS_PPU_FX469_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017D74UL)
#define CYREG_PERI_MS_PPU_FX469_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017D78UL)
#define CYREG_PERI_MS_PPU_FX469_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX470)
  */
#define CYREG_PERI_MS_PPU_FX470_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017D80UL)
#define CYREG_PERI_MS_PPU_FX470_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017D84UL)
#define CYREG_PERI_MS_PPU_FX470_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017D90UL)
#define CYREG_PERI_MS_PPU_FX470_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017D94UL)
#define CYREG_PERI_MS_PPU_FX470_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017D98UL)
#define CYREG_PERI_MS_PPU_FX470_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017D9CUL)
#define CYREG_PERI_MS_PPU_FX470_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017DA0UL)
#define CYREG_PERI_MS_PPU_FX470_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017DA4UL)
#define CYREG_PERI_MS_PPU_FX470_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017DB0UL)
#define CYREG_PERI_MS_PPU_FX470_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017DB4UL)
#define CYREG_PERI_MS_PPU_FX470_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017DB8UL)
#define CYREG_PERI_MS_PPU_FX470_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX471)
  */
#define CYREG_PERI_MS_PPU_FX471_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017DC0UL)
#define CYREG_PERI_MS_PPU_FX471_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017DC4UL)
#define CYREG_PERI_MS_PPU_FX471_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017DD0UL)
#define CYREG_PERI_MS_PPU_FX471_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017DD4UL)
#define CYREG_PERI_MS_PPU_FX471_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017DD8UL)
#define CYREG_PERI_MS_PPU_FX471_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017DDCUL)
#define CYREG_PERI_MS_PPU_FX471_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017DE0UL)
#define CYREG_PERI_MS_PPU_FX471_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017DE4UL)
#define CYREG_PERI_MS_PPU_FX471_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017DF0UL)
#define CYREG_PERI_MS_PPU_FX471_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017DF4UL)
#define CYREG_PERI_MS_PPU_FX471_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017DF8UL)
#define CYREG_PERI_MS_PPU_FX471_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX472)
  */
#define CYREG_PERI_MS_PPU_FX472_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017E00UL)
#define CYREG_PERI_MS_PPU_FX472_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017E04UL)
#define CYREG_PERI_MS_PPU_FX472_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017E10UL)
#define CYREG_PERI_MS_PPU_FX472_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017E14UL)
#define CYREG_PERI_MS_PPU_FX472_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017E18UL)
#define CYREG_PERI_MS_PPU_FX472_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017E1CUL)
#define CYREG_PERI_MS_PPU_FX472_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017E20UL)
#define CYREG_PERI_MS_PPU_FX472_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017E24UL)
#define CYREG_PERI_MS_PPU_FX472_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017E30UL)
#define CYREG_PERI_MS_PPU_FX472_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017E34UL)
#define CYREG_PERI_MS_PPU_FX472_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017E38UL)
#define CYREG_PERI_MS_PPU_FX472_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX473)
  */
#define CYREG_PERI_MS_PPU_FX473_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017E40UL)
#define CYREG_PERI_MS_PPU_FX473_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017E44UL)
#define CYREG_PERI_MS_PPU_FX473_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017E50UL)
#define CYREG_PERI_MS_PPU_FX473_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017E54UL)
#define CYREG_PERI_MS_PPU_FX473_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017E58UL)
#define CYREG_PERI_MS_PPU_FX473_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017E5CUL)
#define CYREG_PERI_MS_PPU_FX473_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017E60UL)
#define CYREG_PERI_MS_PPU_FX473_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017E64UL)
#define CYREG_PERI_MS_PPU_FX473_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017E70UL)
#define CYREG_PERI_MS_PPU_FX473_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017E74UL)
#define CYREG_PERI_MS_PPU_FX473_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017E78UL)
#define CYREG_PERI_MS_PPU_FX473_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX474)
  */
#define CYREG_PERI_MS_PPU_FX474_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017E80UL)
#define CYREG_PERI_MS_PPU_FX474_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017E84UL)
#define CYREG_PERI_MS_PPU_FX474_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017E90UL)
#define CYREG_PERI_MS_PPU_FX474_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017E94UL)
#define CYREG_PERI_MS_PPU_FX474_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017E98UL)
#define CYREG_PERI_MS_PPU_FX474_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017E9CUL)
#define CYREG_PERI_MS_PPU_FX474_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017EA0UL)
#define CYREG_PERI_MS_PPU_FX474_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017EA4UL)
#define CYREG_PERI_MS_PPU_FX474_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017EB0UL)
#define CYREG_PERI_MS_PPU_FX474_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017EB4UL)
#define CYREG_PERI_MS_PPU_FX474_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017EB8UL)
#define CYREG_PERI_MS_PPU_FX474_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX475)
  */
#define CYREG_PERI_MS_PPU_FX475_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017EC0UL)
#define CYREG_PERI_MS_PPU_FX475_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017EC4UL)
#define CYREG_PERI_MS_PPU_FX475_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017ED0UL)
#define CYREG_PERI_MS_PPU_FX475_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017ED4UL)
#define CYREG_PERI_MS_PPU_FX475_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017ED8UL)
#define CYREG_PERI_MS_PPU_FX475_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017EDCUL)
#define CYREG_PERI_MS_PPU_FX475_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017EE0UL)
#define CYREG_PERI_MS_PPU_FX475_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017EE4UL)
#define CYREG_PERI_MS_PPU_FX475_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017EF0UL)
#define CYREG_PERI_MS_PPU_FX475_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017EF4UL)
#define CYREG_PERI_MS_PPU_FX475_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017EF8UL)
#define CYREG_PERI_MS_PPU_FX475_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX476)
  */
#define CYREG_PERI_MS_PPU_FX476_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017F00UL)
#define CYREG_PERI_MS_PPU_FX476_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017F04UL)
#define CYREG_PERI_MS_PPU_FX476_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017F10UL)
#define CYREG_PERI_MS_PPU_FX476_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017F14UL)
#define CYREG_PERI_MS_PPU_FX476_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017F18UL)
#define CYREG_PERI_MS_PPU_FX476_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017F1CUL)
#define CYREG_PERI_MS_PPU_FX476_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017F20UL)
#define CYREG_PERI_MS_PPU_FX476_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017F24UL)
#define CYREG_PERI_MS_PPU_FX476_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017F30UL)
#define CYREG_PERI_MS_PPU_FX476_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017F34UL)
#define CYREG_PERI_MS_PPU_FX476_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017F38UL)
#define CYREG_PERI_MS_PPU_FX476_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX477)
  */
#define CYREG_PERI_MS_PPU_FX477_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017F40UL)
#define CYREG_PERI_MS_PPU_FX477_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017F44UL)
#define CYREG_PERI_MS_PPU_FX477_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017F50UL)
#define CYREG_PERI_MS_PPU_FX477_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017F54UL)
#define CYREG_PERI_MS_PPU_FX477_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017F58UL)
#define CYREG_PERI_MS_PPU_FX477_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017F5CUL)
#define CYREG_PERI_MS_PPU_FX477_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017F60UL)
#define CYREG_PERI_MS_PPU_FX477_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017F64UL)
#define CYREG_PERI_MS_PPU_FX477_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017F70UL)
#define CYREG_PERI_MS_PPU_FX477_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017F74UL)
#define CYREG_PERI_MS_PPU_FX477_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017F78UL)
#define CYREG_PERI_MS_PPU_FX477_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX478)
  */
#define CYREG_PERI_MS_PPU_FX478_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017F80UL)
#define CYREG_PERI_MS_PPU_FX478_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017F84UL)
#define CYREG_PERI_MS_PPU_FX478_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017F90UL)
#define CYREG_PERI_MS_PPU_FX478_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017F94UL)
#define CYREG_PERI_MS_PPU_FX478_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017F98UL)
#define CYREG_PERI_MS_PPU_FX478_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017F9CUL)
#define CYREG_PERI_MS_PPU_FX478_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017FA0UL)
#define CYREG_PERI_MS_PPU_FX478_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017FA4UL)
#define CYREG_PERI_MS_PPU_FX478_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017FB0UL)
#define CYREG_PERI_MS_PPU_FX478_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017FB4UL)
#define CYREG_PERI_MS_PPU_FX478_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017FB8UL)
#define CYREG_PERI_MS_PPU_FX478_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX479)
  */
#define CYREG_PERI_MS_PPU_FX479_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40017FC0UL)
#define CYREG_PERI_MS_PPU_FX479_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40017FC4UL)
#define CYREG_PERI_MS_PPU_FX479_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40017FD0UL)
#define CYREG_PERI_MS_PPU_FX479_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40017FD4UL)
#define CYREG_PERI_MS_PPU_FX479_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40017FD8UL)
#define CYREG_PERI_MS_PPU_FX479_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40017FDCUL)
#define CYREG_PERI_MS_PPU_FX479_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40017FE0UL)
#define CYREG_PERI_MS_PPU_FX479_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40017FE4UL)
#define CYREG_PERI_MS_PPU_FX479_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40017FF0UL)
#define CYREG_PERI_MS_PPU_FX479_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40017FF4UL)
#define CYREG_PERI_MS_PPU_FX479_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40017FF8UL)
#define CYREG_PERI_MS_PPU_FX479_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40017FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX480)
  */
#define CYREG_PERI_MS_PPU_FX480_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40018000UL)
#define CYREG_PERI_MS_PPU_FX480_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40018004UL)
#define CYREG_PERI_MS_PPU_FX480_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40018010UL)
#define CYREG_PERI_MS_PPU_FX480_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40018014UL)
#define CYREG_PERI_MS_PPU_FX480_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40018018UL)
#define CYREG_PERI_MS_PPU_FX480_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001801CUL)
#define CYREG_PERI_MS_PPU_FX480_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40018020UL)
#define CYREG_PERI_MS_PPU_FX480_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40018024UL)
#define CYREG_PERI_MS_PPU_FX480_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40018030UL)
#define CYREG_PERI_MS_PPU_FX480_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40018034UL)
#define CYREG_PERI_MS_PPU_FX480_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40018038UL)
#define CYREG_PERI_MS_PPU_FX480_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001803CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX481)
  */
#define CYREG_PERI_MS_PPU_FX481_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40018040UL)
#define CYREG_PERI_MS_PPU_FX481_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40018044UL)
#define CYREG_PERI_MS_PPU_FX481_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40018050UL)
#define CYREG_PERI_MS_PPU_FX481_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40018054UL)
#define CYREG_PERI_MS_PPU_FX481_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40018058UL)
#define CYREG_PERI_MS_PPU_FX481_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001805CUL)
#define CYREG_PERI_MS_PPU_FX481_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40018060UL)
#define CYREG_PERI_MS_PPU_FX481_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40018064UL)
#define CYREG_PERI_MS_PPU_FX481_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40018070UL)
#define CYREG_PERI_MS_PPU_FX481_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40018074UL)
#define CYREG_PERI_MS_PPU_FX481_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40018078UL)
#define CYREG_PERI_MS_PPU_FX481_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001807CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX482)
  */
#define CYREG_PERI_MS_PPU_FX482_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40018080UL)
#define CYREG_PERI_MS_PPU_FX482_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40018084UL)
#define CYREG_PERI_MS_PPU_FX482_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40018090UL)
#define CYREG_PERI_MS_PPU_FX482_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40018094UL)
#define CYREG_PERI_MS_PPU_FX482_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40018098UL)
#define CYREG_PERI_MS_PPU_FX482_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001809CUL)
#define CYREG_PERI_MS_PPU_FX482_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400180A0UL)
#define CYREG_PERI_MS_PPU_FX482_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400180A4UL)
#define CYREG_PERI_MS_PPU_FX482_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400180B0UL)
#define CYREG_PERI_MS_PPU_FX482_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400180B4UL)
#define CYREG_PERI_MS_PPU_FX482_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400180B8UL)
#define CYREG_PERI_MS_PPU_FX482_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400180BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX483)
  */
#define CYREG_PERI_MS_PPU_FX483_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400180C0UL)
#define CYREG_PERI_MS_PPU_FX483_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400180C4UL)
#define CYREG_PERI_MS_PPU_FX483_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400180D0UL)
#define CYREG_PERI_MS_PPU_FX483_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400180D4UL)
#define CYREG_PERI_MS_PPU_FX483_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400180D8UL)
#define CYREG_PERI_MS_PPU_FX483_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400180DCUL)
#define CYREG_PERI_MS_PPU_FX483_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400180E0UL)
#define CYREG_PERI_MS_PPU_FX483_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400180E4UL)
#define CYREG_PERI_MS_PPU_FX483_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400180F0UL)
#define CYREG_PERI_MS_PPU_FX483_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400180F4UL)
#define CYREG_PERI_MS_PPU_FX483_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400180F8UL)
#define CYREG_PERI_MS_PPU_FX483_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400180FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX484)
  */
#define CYREG_PERI_MS_PPU_FX484_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40018100UL)
#define CYREG_PERI_MS_PPU_FX484_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40018104UL)
#define CYREG_PERI_MS_PPU_FX484_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40018110UL)
#define CYREG_PERI_MS_PPU_FX484_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40018114UL)
#define CYREG_PERI_MS_PPU_FX484_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40018118UL)
#define CYREG_PERI_MS_PPU_FX484_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001811CUL)
#define CYREG_PERI_MS_PPU_FX484_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40018120UL)
#define CYREG_PERI_MS_PPU_FX484_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40018124UL)
#define CYREG_PERI_MS_PPU_FX484_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40018130UL)
#define CYREG_PERI_MS_PPU_FX484_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40018134UL)
#define CYREG_PERI_MS_PPU_FX484_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40018138UL)
#define CYREG_PERI_MS_PPU_FX484_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001813CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX485)
  */
#define CYREG_PERI_MS_PPU_FX485_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40018140UL)
#define CYREG_PERI_MS_PPU_FX485_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40018144UL)
#define CYREG_PERI_MS_PPU_FX485_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40018150UL)
#define CYREG_PERI_MS_PPU_FX485_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40018154UL)
#define CYREG_PERI_MS_PPU_FX485_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40018158UL)
#define CYREG_PERI_MS_PPU_FX485_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001815CUL)
#define CYREG_PERI_MS_PPU_FX485_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40018160UL)
#define CYREG_PERI_MS_PPU_FX485_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40018164UL)
#define CYREG_PERI_MS_PPU_FX485_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40018170UL)
#define CYREG_PERI_MS_PPU_FX485_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40018174UL)
#define CYREG_PERI_MS_PPU_FX485_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40018178UL)
#define CYREG_PERI_MS_PPU_FX485_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4001817CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX486)
  */
#define CYREG_PERI_MS_PPU_FX486_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40018180UL)
#define CYREG_PERI_MS_PPU_FX486_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40018184UL)
#define CYREG_PERI_MS_PPU_FX486_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40018190UL)
#define CYREG_PERI_MS_PPU_FX486_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40018194UL)
#define CYREG_PERI_MS_PPU_FX486_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40018198UL)
#define CYREG_PERI_MS_PPU_FX486_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4001819CUL)
#define CYREG_PERI_MS_PPU_FX486_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400181A0UL)
#define CYREG_PERI_MS_PPU_FX486_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400181A4UL)
#define CYREG_PERI_MS_PPU_FX486_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400181B0UL)
#define CYREG_PERI_MS_PPU_FX486_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400181B4UL)
#define CYREG_PERI_MS_PPU_FX486_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400181B8UL)
#define CYREG_PERI_MS_PPU_FX486_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400181BCUL)

#endif /* _CYREG_PERI_MS_H_ */


/* [] END OF FILE */
